From Jeff's tagline:


Speaking as a septuagenarian, I can vouch for Jeff's recommendations. Your primary source of vitamin-D is natural sunlight, which is in short supply this time of year in the northern latitudes. Ergo the suggestion of taking a vitamin-D supplement. My own doctor gave me a warning about this about five years ago during a physical exam—my blood chemistry suggested I wasn't receiving sufficient vitamin-D. I am on a prescribed D medication and so far, so good. Bone density is good, joints are still good, etc.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

Speaking of being out of spec, what voltage do you run the 65c816 at for stable operation at 16MHz? this is a question I had after looking at the data sheet, where it shows the comparison between system voltage and clock rates. I note the MAX spec is 7 volts so I am curious if the chip can be pushed to 20MHz if the supply voltage is run up a smidgen more.

-Justin

Forum member Windfall got an '816 going at 24MHz even at 3.3V!
viewtopic.php?p=50721#p50721

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

ah good to know! I'm drawing up a list of specifications for my own board so far I have.

1) adjustable voltage power regulator
2) adjustable clock generator, eg Si5351a it's good for a few KHz thru 290MHz.
3) configurable logic chip for MMU etc al
4) larger address space maybe

-Justin

I'm running it at 5v - currently powered via a USB TTL Serial adapter. My intention was "old school", so 5v, through hole, double sided PCB (start with breadboard then stripboard for the 65C02 then PCB, but I went directly to PCB for the '816 version).

My only concession on the "old school" approach was to use GALs, however PALs and ULAs were about in the early 80's, so I feel happy there. My aim was for an 8Mhz system, but I stuck a 16Mhz xtal in it "for the LoLs", and it worked and was stable, so I left it there. I didn't do anything special other than join the dots when laying out the PCB although I did try to keep the 16Mhz clock traces as short and direct as possible.

Cheers,

-Gordon

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--
Gordon Henderson.
See my Ruby 6502 and 65816 SBC projects here: https://projects.drogon.net/ruby/

Have you published the GAL code?

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

I've not published anything yet, and after recent very bad (and bitter) experiences trying to maintain some GPL code I may not, however - earlier you gave the schematic for your Rd & Wr qualifier - in the GAL this looks like: (* = AND, .T means it's a tristate output and .E is the enable signal for the corresponding Tristate output pin. This is a text file under Linux 'compiled' by GALasm)



BE is the Bus Enable signal that comes from the host ATmega and goes into the GAL and the 65C02. The /RW line from the 6502 goes into the GAL, gets decoded and via tristate outputs into the SRAM. This is because the ATmega also drives these lines when it needs to access the SRAM. (This is the same in both the '02 and 816 systems)

So that saves a single TTL chip. The same GAL does address decoding - takes the top 8 address bits to create an IO signal at $FE00 through $FEFF, so another chip saved. It has to provide 2 CE signals to 2 x 32KB RAM chips which might need a spare gate somewhere and drives some status LEDs too. The Tristating is needed because the host ATmega can see the top 256 bytes of RAM with the 6502 (but not at the same time), so I'm using the BE signal.

In the '816 version this GAL is more or less the same although there is an extra input from the "top 8" GAL to indicate that bank 0 is in-use to further qualify the IO region so banks other than bank 0 don't affect the IO. (65C22). The "top 8" GAL latches the data bus at rising clock and acts as a 3-input OR gate for IRQ combining. If I knew how to use CPLDs I might have used one in the 816 system, but GALs are the top of my programmable logic ken right now.

Cheers,

-Gordon

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--
Gordon Henderson.
See my Ruby 6502 and 65816 SBC projects here: https://projects.drogon.net/ruby/

Getting from a GAL to a CPLD isn't all that much of a leap. As you have been able to define logic for your '816 in a GAL, you already have the knowledge needed to do the same thing in a CPLD. You'll need some different tools to write and test your code, but what you know about GALs can be readily reused.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

It's the tools - software/"compiler" and programmer. Linux only here with the exception of having to use an old Windows XP laptop to run my G540 programmer. Also through hole, but that's not a big show stopper. And maybe I'm just a bit too old-school, but sort of resent having a device with more gates in it than the 6502 has (and yes, I'm using an ATmega 1284p - go figure that one out!)

The trouble is then - where does it end? I look at the Foenix 816 and Neon 816 projects and think "just a bit too much", but also "Hmmm..." ...

Cheers,

Gordon

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--
Gordon Henderson.
See my Ruby 6502 and 65816 SBC projects here: https://projects.drogon.net/ruby/

Gordon, it might end with an modern 4GiB SODIMM wired to an FPGA for use as an MMU!

-Justin

Well, you can run WinCUPL on the XP laptop to program your CPLD. As for the gate count, isn't that the point behind programmable logic?

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x86?  We ain't got no x86.  We don't NEED no stinking x86!