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PostPosted: Sat Jan 05, 2008 5:27 am 
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Joined: Tue Dec 25, 2007 4:57 am
Posts: 109
Hello, I am about to discuss BCD what 65C02 does not do it. I am not too sure how packed bits or unpacked bits work. I do know for sure why 65C02 can’t set negative flag and overflow flag correctly when you use decimal mode. (I do not mean to discuss original decimal mode on 6502 with bugs.)

There has to be another way when you want to use base 10 instead of base 16 to manipulate negative flag and overflow flag.

To work on 4-bit nibble size. You can be able to set or reset negative flag and overflow flag using 3rd bit. Then, you can expand from 4-bit nibble size to 8-bit byte size and use 7th bit to do with negative flag and overflow flag.

Here is an example.

Positive 0 1 2 3 4 5 6 7 8 9
Nibble 0 1 2 3 4 5 6 7 8 9

The nibble uses unsigned nibble with the number from 0 through 9. You should be able to set negative flag on the value from $5 through $9 instead of hex $8 through $F.


Negative –5 –4 –3 –2 –1 0 1 2 3 4
Nibble 5 6 7 8 9 0 1 2 3 4
Nibble2 B C D E F 0 1 2 3 4

The nibble uses signed nibble with the number from –5 through 4. The problem is that nibble size is limited to $0 through $9. You may only be able to set negative flag on $8 and $9. Not enough?

It is a better way to do. You put data into memory like this LDA #-1 and ADC #3. The range between $0 and $4 do not require to do conversion, but the range $5 and $9 require conversion.

After ADC executes, it reads the value $5 through $9. It converts from decimal mode to hex mode (Nibble to Nibble2). Use Nibble2 (value $B through $F) to set negative flag and overflow flag correctly. Then converts back from Nibble2 to Nibble. It makes simpler to use branch to test negative, overflow, zero, and carry flag when you are in decimal mode.

Here is my data what I created to do with overflow flag. It may give you an idea. Acc value has 10 possible data. Memory value has 10 possible data. It creates 100 possible data after ADC. To use byte size, you can create 10,000 possible data after ADC from byte size.

V is the overflow flag. C is the carry flag.


Acc Memory New Acc
0000 0 + 0000 0 = 0000 0 V: 0 C: 0
0000 0 + 0001 1 = 0001 1 V: 0 C: 0
0000 0 + 0010 2 = 0010 2 V: 0 C: 0
0000 0 + 0011 3 = 0011 3 V: 0 C: 0
0000 0 + 0100 4 = 0100 4 V: 0 C: 0
0000 0 + 0101 5 = 0101 5 V: 0 C: 0
0000 0 + 0110 6 = 0110 6 V: 0 C: 0
0000 0 + 0111 7 = 0111 7 V: 0 C: 0
0000 0 + 1000 8 = 1000 8 V: 0 C: 0
0000 0 + 1001 9 = 1001 9 V: 0 C: 0

0001 1 + 0000 0 = 0001 1 V: 0 C: 0
0001 1 + 0001 1 = 0010 2 V: 0 C: 0
0001 1 + 0010 2 = 0011 3 V: 0 C: 0
0001 1 + 0011 3 = 0100 4 V: 0 C: 0
0001 1 + 0100 4 = 0101 5 V: 1 C: 0
0001 1 + 0101 5 = 0110 6 V: 0 C: 0
0001 1 + 0110 6 = 0111 7 V: 0 C: 0
0001 1 + 0111 7 = 1000 8 V: 0 C: 0
0001 1 + 1000 8 = 1001 9 V: 0 C: 0
0001 1 + 1001 9 = 0000 0 V: 0 C: 1

0010 2 + 0000 0 = 0010 2 V: 0 C: 0
0010 2 + 0001 1 = 0011 3 V: 0 C: 0
0010 2 + 0010 2 = 0100 4 V: 0 C: 0
0010 2 + 0011 3 = 0101 5 V: 1 C: 0
0010 2 + 0100 4 = 0110 6 V: 1 C: 0
0010 2 + 0101 5 = 0111 7 V: 0 C: 0
0010 2 + 0110 6 = 1000 8 V: 0 C: 0
0010 2 + 0111 7 = 1001 9 V: 0 C: 0
0010 2 + 1000 8 = 0000 0 V: 0 C: 1
0010 2 + 1001 9 = 0001 1 V: 0 C: 1

0011 3 + 0000 0 = 0011 3 V: 0 C: 0
0011 3 + 0001 1 = 0100 4 V: 0 C: 0
0011 3 + 0010 2 = 0101 5 V: 1 C: 0
0011 3 + 0011 3 = 0110 6 V: 1 C: 0
0011 3 + 0100 4 = 0111 7 V: 1 C: 0
0011 3 + 0101 5 = 1000 8 V: 0 C: 0
0011 3 + 0110 6 = 1001 9 V: 0 C: 0
0011 3 + 0111 7 = 0000 0 V: 0 C: 1
0011 3 + 1000 8 = 0001 1 V: 0 C: 1
0011 3 + 1001 9 = 0010 2 V: 0 C: 1

0100 4 + 0000 0 = 0100 4 V: 0 C: 0
0100 4 + 0001 1 = 0101 5 V: 1 C: 0
0100 4 + 0010 2 = 0110 6 V: 1 C: 0
0100 4 + 0011 3 = 0111 7 V: 1 C: 0
0100 4 + 0100 4 = 1000 8 V: 1 C: 0
0100 4 + 0101 5 = 1001 9 V: 0 C: 0
0100 4 + 0110 6 = 0000 0 V: 0 C: 1
0100 4 + 0111 7 = 0001 1 V: 0 C: 1
0100 4 + 1000 8 = 0010 2 V: 0 C: 1
0100 4 + 1001 9 = 0011 3 V: 0 C: 1

0101 5 + 0000 0 = 0101 5 V: 0 C: 0
0101 5 + 0001 1 = 0110 6 V: 0 C: 0
0101 5 + 0010 2 = 0111 7 V: 0 C: 0
0101 5 + 0011 3 = 1000 8 V: 0 C: 0
0101 5 + 0100 4 = 1001 9 V: 0 C: 0
0101 5 + 0101 5 = 0000 0 V: 1 C: 1
0101 5 + 0110 6 = 0001 1 V: 1 C: 1
0101 5 + 0111 7 = 0010 2 V: 1 C: 1
0101 5 + 1000 8 = 0011 3 V: 1 C: 1
0101 5 + 1001 9 = 0100 4 V: 1 C: 1

0110 6 + 0000 0 = 0110 6 V: 0 C: 0
0110 6 + 0001 1 = 0111 7 V: 0 C: 0
0110 6 + 0010 2 = 1000 8 V: 0 C: 0
0110 6 + 0011 3 = 1001 9 V: 0 C: 0
0110 6 + 0100 4 = 0000 0 V: 0 C: 1
0110 6 + 0101 5 = 0001 1 V: 1 C: 1
0110 6 + 0110 6 = 0010 2 V: 1 C: 1
0110 6 + 0111 7 = 0011 3 V: 1 C: 1
0110 6 + 1000 8 = 0100 4 V: 1 C: 1
0110 6 + 1001 9 = 0101 5 V: 0 C: 1

0111 7 + 0000 0 = 0111 7 V: 0 C: 0
0111 7 + 0001 1 = 1000 8 V: 0 C: 0
0111 7 + 0010 2 = 1001 9 V: 0 C: 0
0111 7 + 0011 3 = 0000 0 V: 0 C: 1
0111 7 + 0100 4 = 0001 1 V: 0 C: 1
0111 7 + 0101 5 = 0010 2 V: 1 C: 1
0111 7 + 0110 6 = 0011 3 V: 1 C: 1
0111 7 + 0111 7 = 0100 4 V: 1 C: 1
0111 7 + 1000 8 = 0101 5 V: 0 C: 1
0111 7 + 1001 9 = 0110 6 V: 0 C: 1

1000 8 + 0000 0 = 1000 8 V: 0 C: 0
1000 8 + 0001 1 = 1001 9 V: 0 C: 0
1000 8 + 0010 2 = 0000 0 V: 0 C: 1
1000 8 + 0011 3 = 0001 1 V: 0 C: 1
1000 8 + 0100 4 = 0010 2 V: 0 C: 1
1000 8 + 0101 5 = 0011 3 V: 1 C: 1
1000 8 + 0110 6 = 0100 4 V: 1 C: 1
1000 8 + 0111 7 = 0101 5 V: 0 C: 1
1000 8 + 1000 8 = 0110 6 V: 0 C: 1
1000 8 + 1001 9 = 0111 7 V: 0 C: 1

1001 9 + 0000 0 = 1001 9 V: 0 C: 0
1001 9 + 0001 1 = 0000 0 V: 0 C: 1
1001 9 + 0010 2 = 0001 1 V: 0 C: 1
1001 9 + 0011 3 = 0010 2 V: 0 C: 1
1001 9 + 0100 4 = 0011 3 V: 0 C: 1
1001 9 + 0101 5 = 0100 4 V: 1 C: 1
1001 9 + 0110 6 = 0101 5 V: 0 C: 1
1001 9 + 0111 7 = 0110 6 V: 0 C: 1
1001 9 + 1000 8 = 0111 7 V: 0 C: 1
1001 9 + 1001 9 = 1000 8 V: 0 C: 1


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