I can't for the life of me figure out what is wrong with my code.

I want my register "[Rom_Bank_Reg7..0]" to be written when the input address is between 0x2000 - 0x2FFF (and WR is asserted). I've included the top 4 bits of the address bus as inputs so I can detect this address range.

The output "[hiRom7..0]" should behave as follows:

• If address is between 0x0000 and 0x3FFF, set output to 0x00
• If address between 0x4000 and 0x7FFF, set output to contents of "[Rom_Bank_Reg7..0]"

Because the system only reads from from for addresses less than 0x8000, I am using A15 as a CE (active low) for the ROM.

I don't think the ATF1504ASL supports synchronous resets, so that's why I'm using asynchronous. I didn't think this would be a problem, since my RESET signal is coming from an input pin (faster than using product terms). However, my program keeps hanging when I try to execute it. Does anyone see any issues below, especially regarding any potential reset issues?

Just in case, .l is the latch input, .le is the latch enable, and .ar is the async reset.

Sorry if I ask any dumb questions, I'm a total newbie and WinCUPL is surprisingly hard to find help with.

For a start, shouldn't it be:

Normally, yes, but this system is mapped in such a way that I was able to remove A12 for this equation. I'll go ahead and add it in there for clarity, though. And just to be sure, I added it back to the code and tested again, but I'm still getting random hangs/resets.

Okay, what about: Plus I don't see any term for controlling the tristating. I forget which term you need to make to control that, so I'll assume .oe; the above equation can then be split into two parts:

So are you saying you want the outputs tri-stated when the address bus is below 0x4000?

I get the idea of of using banked memory, but the bank select lines are usually driven all the time to memory device in addition to the lower-order address lines from the microprocessor. The /CS line would be used to enable the memory device.

Aside from that, in order to gate addresses above 0x4000, you need to use an OR gate with A15 and A14. Using just A14 only enables 0x4000-0x7FFF and 0xC000-0xFFFF. 0x8000-0xBFFF would not be enabled as A14 is low in that range.

So, from Chromatix's example,


From your original code, the outputs would match the latch when A14 is high and the outputs would be 0x00 when A14 is low. If it is desired to have to outputs be 0x00 when the address is below 0x4000, then try this:


Hope that helps!

Daryl

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I would prefer the bank select lines to never be tristated if possible. I had assumed they would always be driven in my code.
About the output equation, the A15 line is also used as the CE for the ROM (active low), because this system only tries to read from ROM between 0x0000 and 0x7FFF. Sorry, I should've mentioned that originally.

So, when the system tries to read between 0x0000 and 0x3FFF, I want [hiRom7..0] to output 0x00 (preferably 0x01, but 0x00 will work for now).
Between 0x4000 and 0x7FFF, I want it to output whatever "bank number" was written to the Bank Register. So if register value = 0x02, then when the system tries to read 0x4000 - 0x7FFF, it's really reading from 0x8000 - 0xBFFF. This is why I only used A14 when deciding to set the bank select lines high.
Thank you for the advice so far.

That is good, and your code should work as written. Except, where is your RAM? If you have any interrupts or JSR opcodes, you'll need RAM on the stack page (0x0100). Otherwise, the return addresses will not be stored and your code will crash for sure.

Typical 6502 memory is RAM starting from the bottom, 0x0000, and working upward and ROM located at 0xFFFF and working down. That way the vectors in page 0xFFxx are valid at startup. That's another question, is there ROM at 0xFFFC & 0xFFFD holding a valid reset vector?

Daryl

_________________
Please visit my website -> https://sbc.rictor.org/

I just realized I've made a huge mistake. While I was researching WinCUPL, I kept coming to this site for code examples. All this time I thought people were just asking general questions about WinCUPL, and I didn't pay attention to the name of the website. My project isn't for a 6502...it's for a variation of z80 (unofficially the "GB z80") used in the Nintendo Gameboy.

I feel pretty silly now, but you did give me something to think about. I checked and the ROM I'm testing with is expecting extra RAM to be installed, so that might explain the crashes. I will find another program that doesn't need extra RAM and test with that until I get my RAM logic added.

I wish I could delete this post now since it isn't relevant to the forum, maybe a moderator can? Sorry again for the mix up, but thanks for all the help!

No, it's fine I think. Maybe it should be moved to the Programmable Logic section, but…

I could mention the sister site anycpu.org?

I moved it to "Programmable Logic." This is specifically a 65xx forum though, and even the programmable logic section is for, as the title on the front page says, "Topics relating to PALs, CPLDs, FPGAs, and other PLDs used for the support or creation of 65-family processors, both hardware and HDL." For non-65-related topics, please do join us on the AnyCPU forum. Thanks.

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?