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 Post subject: 6502 timing logic
PostPosted: Thu May 16, 2019 5:35 pm 
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Joined: Mon Mar 25, 2019 4:28 pm
Posts: 20
As far as I know all the timing logic related states are T0, T+, T2, T3, T4, T5, T1, V0, T6, SD1 and SD2. I'm having a bit trouble finding some of these nodes from visual6502.
The ones I have found are (but not sure if all are correct):
T2 (node: 971)
T3 (node: 1567)
T4 (node: 690)
T5 (node: 909)
T1 (node: 862)
V0 (node: 1465)
T6 (node: 1481)

I think nodes 16 and 1357 are used for timing logic, but I'm not sure which ones they are (might be T0 and T+). #VEC might be one of the states with a different name too. SD1 and SD2 are the ones I don't think I've been able to getting even close to finding.

Can someone give me some directions for the missing nodes and correct any incorrect information


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 Post subject: Re: 6502 timing logic
PostPosted: Thu May 16, 2019 6:43 pm 
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Location: England
I posted some pointers for further reading here:
viewtopic.php?p=58631#p58631

See if that helps.


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 Post subject: Re: 6502 timing logic
PostPosted: Thu May 16, 2019 7:51 pm 
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Here you go....

Attachment:
6502_SD12.png
6502_SD12.png [ 590.78 KiB | Viewed 924 times ]


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 Post subject: Re: 6502 timing logic
PostPosted: Thu May 16, 2019 8:07 pm 
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(Thanks!)


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 Post subject: Re: 6502 timing logic
PostPosted: Thu May 16, 2019 9:14 pm 
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Found some more:

Attachment:
6502_T01.png
6502_T01.png [ 2.89 MiB | Viewed 909 times ]
Attachment:
6502_T25.png
6502_T25.png [ 1.26 MiB | Viewed 909 times ]
Attachment:
6502_T56.png
6502_T56.png [ 601.02 KiB | Viewed 909 times ]


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 Post subject: Re: 6502 timing logic
PostPosted: Thu May 16, 2019 9:15 pm 
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Posts: 91
And don't forget ACR:

Attachment:
6502_ACR.png
6502_ACR.png [ 273.28 KiB | Viewed 909 times ]


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 Post subject: Re: 6502 timing logic
PostPosted: Fri Jun 14, 2019 4:47 pm 
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Sorry for the long delay

Thanks for the pictures. I was a bit curious if you can find more of these pictures somewhere?


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 Post subject: Re: 6502 timing logic
PostPosted: Sat Jun 15, 2019 6:33 pm 
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FreyFox wrote:
Sorry for the long delay

Thanks for the pictures. I was a bit curious if you can find more of these pictures somewhere?


What else do you need? :wink:


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 Post subject: Re: 6502 timing logic
PostPosted: Mon Jun 17, 2019 9:56 am 
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This should be the PLA/Decode rom without ROR bug:

Attachment:
6502_PLA_ROR_fixed.png
6502_PLA_ROR_fixed.png [ 2.39 MiB | Viewed 725 times ]


I compared it to the die shot... and fixed the schematics. However no guarantee I missed something else. :)


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 Post subject: Re: 6502 timing logic
PostPosted: Fri Jun 21, 2019 11:11 am 
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fhw72 wrote:
What else do you need? :wink:


Nothing in particular, just wondering if you can find them on a website or something. It would be useful reference if I ever need it.


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