I think there are two or three unrelated ideas in here. It's true that some internal busses on the 6502 are precharged, and there are two ways in which that's used: it's used to correct the weak logic 1 that passes through a pass transistor, by arranging that the pass transistor only needs to pass a 0; and it's used to produce a logic '1' on an otherwise undriven bus. That latter effect allows for the constant FF to be available for free. And in that circumstance, we also see conditional pulldowns which can convert an FF to an FE, FD, FC, FB or FA, which are all needed for the low byte of the address bus when fetching vectors.
In most situations, a bus is always driven. The nature of NMOS logic gates is that there's always a pullup, and the pulldown (or pulldowns) act to drive the voltage of the output towards ground. There's always, in effect, a resistive divider. It's sometimes better to think of MOS transistors as voltage-controlled resistors. Sometimes it's enough to think of them as voltage-controlled switches.
In any case, if a node at a high voltage is subsequently driven to a low voltage, that means charge has been moved, which means current has flowed. If you think of a resistor to ground, which is what a pulldown transistor is acting as, you can see how current will flow, and that's how the voltage drops, as the charge leaks away.
To read a register, the state bit is pretty much always going to be read through a logic gate of some sort. That is, a charge-storing node will not be connected directly to a bus, in a charge-sharing kind of way. The charge-storing node will control a pulldown, that forms an inverter, and it will drive a bus through one or more pass gates.
Hope this helps. We might need a picture - if we do, perhaps you can draw it, or find it!
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