I'm having a small problem and was wondering if anyone might have some insight for me. I've built an SBC based on the 65C02 and it is running great at 8mhz. I am using the MAX3100 UART and I am talking to it using SPI. In a pure polling mode it is working great and I send and receive over serial at 115200 baud without problems.

I wanted to get this working using the interrupt capability of the MAX3100 but I am running into a problem. I have the IRQ line from the UART connected to the 65C22 through it's CB2 pin. I have a 3.3k pullup resistor on the line since the UART's IRQ is open drain.

I have configured the UART to issue an IRQ when it has data in it's receive buffer and have configured the VIA to assert an IRQ when CB2 gets a negative edge. The code to init the VIA is basically this:


What I am seeing is that the 65C22 never seems to react to CB2 going low. When I looked at the lines with my oscilloscope I see the UART pull the line low and I have verified it going low by probing at both the UART's IRQ pin and the 65C22's CB2 pin. The 65C22's IRQ line stays high. One interesting thing to note is that most of the other lines on my SBC are at or below 1mv when driving low. But the line between the UART's IRQ pin and the CB2 pin on the 65C22 is reading about 30mv when driving low. I'm almost thinking that the CB2 pin is not actually set as in input and is instead floating.

I've tested how I am configuring the UART interrupts on an Arduino and the Arduino get interrupts no problem, and since I see the UART's IRQ line go low when I expect it to, I am confident I am configuring it correctly.

Am I configuring the VIA correctly or am I missing something?

I've not used a 6522 in this way, but It looks OK to me, however try writing $08 into the IFR as part of the setup sequence to force-clear any potentially pending interrupt - just in-case...

You can probably just:



See pg. 26 of the data sheet where it talks about how to clear a CB1/2 interrupt when they're in independent mode.

You may also want to poll the IFR too - see if the top bit is set to double-check...

-Gordon

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Gordon Henderson.
See my Ruby 6502 and 65816 SBC projects here: https://projects.drogon.net/ruby/

I am actually doing that in the code I'm running on my SBC. I am also checking both bit 7 and bit 3 (CB2 interrupt) in the IFR to determine where the interrupt came from.

The 65C22 just never seems to recognize that CB2 has received a falling edge, and so it never asserts it's IRQ line. The VIA seems to be working correctly besides the CB2 problem as it is the same VIA I am using to bit bang SPI to talk to the UART, and if I am simply polling the UART it works.

Did you try to generate any other interrupt out of the 65C22? Like a timer overflow etc.? Does that work?

Actually I haven't done that yet. I'll have to give that a try.

As far as I remember (without looking into the 6522 DS) I remember there was a sort of handshake mode that uses Cx1 and Cx2 to handshake a parallel transfer. If you are using Port B to interact with the MAX and try to use CB2 as an IRQ input this might collide (again I am not sure about this). Perhaps - if possible - you try CA2 instead.

In all cases: avoid using port A and/or B for any other reason until you have successfully got an interrupt. Then you might check what is interfering. At least I can tell you that on my old SYM I had used one of them (CAx I think) for recognizing an edge - it had worked.

The handshake mode for PB is only with 100xxxxx in the PCR. He's using 001xxxxx which is independent. I don't remember ever having used that mode (which is why I have not said anything so far), but I have used other independent modes like 110xxxxx (low output) and 111xxxxx (high output), using the pin as another independent output bit, with no problems.

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Ok, I feel really dumb right now
Everything is working perfectly. After spending a little more time reviewing my code, I found this little nugget.

That is my define for the enable CB2 interrupt bit that you write into the IER on the 6522. The bit is off by one place. It should be

So I was never getting an interrupt from CB2 because I had enabled interrupts for the shift register which is disabled.

Now I'm getting my interrupts and my IRQ driven UART receive buffer is working like a charm. Near as I can tell, I copy/pasted and didn't make all the changes I needed to the new line of code.

Thanks for the suggestions everyone, I really appreciate them.

Personally, i would prefer to wire (or gate) all the IRQ lines together so that they reach the CPU directly, instead of going through a VIA. You can also use a priority encoder to help determine exactly which interrupt has fired, if you don't want to poll every possible device each time.