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 Post subject: 65xx FPGA implementation
PostPosted: Tue Aug 07, 2007 1:23 am 
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Joined: Sun Aug 05, 2007 10:05 pm
Posts: 3
Location: Poland
Some memories rewritten few days ago.
Image
I'm thinking of implementing other C64 chips in a FPGA :D

Dyzio


Last edited by Dyzio on Fri Nov 09, 2007 10:11 am, edited 2 times in total.

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PostPosted: Tue Aug 07, 2007 4:28 am 
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That is just such a waste of time and energy.

I love it!

Say, what is the program/cartridge in the upper right-hand corner?

Also, how much of the FPGA are you using? Are you planning on putting the VIC-II on-board with the CPU in the same chip?


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PostPosted: Tue Aug 07, 2007 8:51 am 
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Location: Poland
kc5tja wrote:
That is just such a waste of time and energy.

I love it!

Say, what is the program/cartridge in the upper right-hand corner?

Also, how much of the FPGA are you using? Are you planning on putting the VIC-II on-board with the CPU in the same chip?


It's a enhanced basic with some extra features like fast tape loading. It was very popular in Poland years ago.

314 slices in Xilinx FPGA, 621 logic elements in Altera FPGA and approximately 2,5k gates (using BuildGate).

Yes, video and other peripheral devices.

BR
Dyzio


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PostPosted: Tue Aug 07, 2007 7:11 pm 
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Joined: Tue Mar 02, 2004 8:55 am
Posts: 996
Location: Berkshire, UK
Did you design your own CPU core or use an existing one? VHDL or Verilog?

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Andrew Jacobs
6502 & PIC Stuff - http://www.obelisk.me.uk/
Cross-Platform 6502/65C02/65816 Macro Assembler - http://www.obelisk.me.uk/dev65/
Open Source Projects - https://github.com/andrew-jacobs


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PostPosted: Tue Aug 07, 2007 7:28 pm 
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That's my own design in VHDL.


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