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 Post subject: Re: 65c02 at 16Mhz
PostPosted: Fri Nov 30, 2018 8:33 pm 
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I'm aware I can upload. I also run my own servers which are also backed up. I host my own images so I can show others without giving a forum link, nor subjecting them to slow bandwidths or stupid adverts. However I've also used other forums which will grab and create thumbnails on the fly.
OK, no worries -- I was mainly just answering the thumbnail question. I wasn't aware that other forums take off-site images and create thumbnails on the fly. But I did notice you're hosting the images on your own site.

The second paragraph of my post wasn't directed at you specifically; it was a reminder to everyone. No need to use third-party image-hosting sites.

Looking forward to seeing your blog when you publish... :)

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 Post subject: Re: 65c02 at 16Mhz
PostPosted: Mon Mar 18, 2019 5:32 pm 
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Nice project, I sure missed a lot while I have been away, stuck in the Matrix of the "real world".

Yep, I am AtomicZombie on all other forums. Not sure why I chose to use this username here!
Let me know if I can assist with AVR assembler / video in any way... that's my thing.

You may even consider an XMega, it has 32K interal SRAM and can easily bit bang full color, even NTSC.
If you go with 16 colors, you could even double buffer a VIC-20 sizes screen at 176*184.

Look forward to seeing more of your work.
Brad

drogon wrote:
I think the timing fixup code comes from our very own Oneironaut/Vi-20 Jet Pack member on another forum under another name but I could be wrong...


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 Post subject: Re: 65c02 at 16Mhz
PostPosted: Tue Mar 19, 2019 7:48 am 
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Oneironaut wrote:
Nice project, I sure missed a lot while I have been away, stuck in the Matrix of the "real world".

Yep, I am AtomicZombie on all other forums. Not sure why I chose to use this username here!
Let me know if I can assist with AVR assembler / video in any way... that's my thing.

You may even consider an XMega, it has 32K interal SRAM and can easily bit bang full color, even NTSC.
If you go with 16 colors, you could even double buffer a VIC-20 sizes screen at 176*184.

Look forward to seeing more of your work.
Brad


Thanks.

I picked the ATmega mostly because through hole. I've also been through a few iterations of my design and ideas since then, so I'll be sticking to the original monochrome video I have, although I'm going to consider it "optional" - mostly because it slows other operations down - the ATmega is now running the filing system, serial keyboard and some other stuff too.

I still have some timing issues - it generates a rock-solid image on my modern multi-input portable TV, but it wobbles a little on an old analog monitor - I think I'm suffering from a 1 cycle jitter issue which I've seen fixed up in some ASM code, however my generator is 100% C code right now. the TV (capable of 720p with HDMI, composite, uhf, scart, etc. inputs) probably samples and stabilises it. It's not a big issue in the grand scheme of things, so my thoughts are that the SBC is really a 6502 with serial interface, and I have a separate "graphics card" planned (a $5 ARM based computer) much like some of the early system had separate boards for other "stuff".

Cheers,

-Gordon

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See my Ruby 6502 and 65816 SBC projects here: https://projects.drogon.net/ruby/


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 Post subject: Re: 65c02 at 16Mhz
PostPosted: Tue Mar 19, 2019 12:57 pm 
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Yes, that 1 cycle out of 500,000 / frame is always enough to cause jitter.

If you are using GCC, you could code your interrupt in ASM and then use the Jitter Fixer code I posted at AVR Freaks. You could even call your render loop from there if you prefer to stay in C.

Here is an example from a VGA video game system I did for an Atmega-328.
The ASM side handles the interrup entry here, including jitter fixer...

Code:
// VIDEO INTERRUPT ENTRY POINT (4)
.global TIMER1_COMPA_vect
TIMER1_COMPA_vect: ;4

// SAVE STATUS REGISTER (5)
push r16 ;2
in r16,SREG ;1
push r16 ;2

// LATENCY EQUALIZER (11)
lds r16,TCNT1L ;2
cpi r16,14 ;1
brlo AVRC_FIX1 ;1/2
AVRC_FIX1:
cpi r16,15 ;1
brlo AVRC_FIX2 ;1/2
AVRC_FIX2:
cpi r16,16 ;1
brlo AVRC_FIX3 ;1/2
AVRC_FIX3:


Instead of rendering the frame here, you could always boot out and just call your C driver instead.

Code:
pop r16 ;2
out SREG,r16 ;1
pop r16 ;2

// RETURN TO MAIN
reti ;4


I based my timing on this one for 640x480 @ 60Hz...

Code:
// [40 MHZ HORIZONTAL TIMING FOR 640 X 480 @ 60 HZ]
// HSP : 0150 FROM 0000 TO 0149 (-)
// HBP : 0074 FROM 0150 TO 0223
// HPX : 1024 FROM 0224 TO 1247
// HFP : 0024 FROM 1248 TO 1271
// TOT : 1272

// [VERTICAL LINE TIMING]
// VLN : 480 FROM 000 TO 479
// VFP : 011 FROM 480 TO 490
// VSP : 002 FROM 491 TO 492 (-)
// VBP : 031 FROM 493 TO 523
// TOT : 524


Here are the timer settings...

Code:
// TIMER 1 VIDEO INTERRUPT @ 1272 CYCLES
ldi r18,9
sts TCCR1B,r18
ldi r18,2
sts TIMSK1,r18
ldi r18,hi8(1271)
sts OCR1AH,r18
ldi r18,lo8(1271)
sts OCR1AL,r18


Being a 328P, it overclocks to 40Mhz (32MHz safe margin), so there is a lot of headroom for graphics!
The 1284P is a better choice for retro BW video though, as it has so much internal SRAM.
Sadly, the 1284 will not run safely beyond 25MHz.

Here is a quick NTSC Timing Calc I made that allows you to try various clock settings...

http://lucidscience.com/temp/ntsc.exe

It also keeps to the burst multiple in case you ever want to do color.

Brad


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 Post subject: Re: 65c02 at 16Mhz
PostPosted: Tue Mar 19, 2019 1:44 pm 
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Oneironaut wrote:

Being a 328P, it overclocks to 40Mhz (32MHz safe margin), so there is a lot of headroom for graphics!
The 1284P is a better choice for retro BW video though, as it has so much internal SRAM.
Sadly, the 1284 will not run safely beyond 25MHz.

Brad


Thanks - I'll check the code snippets shortly - I've not done any AVR assembler, but I think the idea is that you take up the jitter by waiting until the timer low value is at a fixed value appropriate to your video generator...?

I'm using an Atmega1284p clocked at 16Mhz. video resolution is 320x240x1 - PAL composite output.

I use T2 to generate an interrupt every 16µS. The video shifter uses the 2nd serial port in SPI mode and PortD, bit 4 for sync output.

Other than the jitter, the issue is that leaves little time to do anything else - so out of every 64µS, I'm clocking out 40 bytes which takes 40µS (SPI clock is 8Mhz) plus a few more for back/front porch, etc. I do get a good number more free cycles at the start & end of each frame when outputting blank lines and vsync. Overclocking would help, but I've never been a fan of really pushing the limits (says the guy with the 16Mhz 65c02 on stripboard :-)

Couple of videos:

https://youtu.be/09zhGUbVxdU

https://youtu.be/1Iv-bDmkW2M

Cheers,

-Gordon

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Gordon Henderson.
See my Ruby 6502 and 65816 SBC projects here: https://projects.drogon.net/ruby/


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 Post subject: Re: 65c02 at 16Mhz
PostPosted: Tue Mar 19, 2019 4:43 pm 
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Location: Gillies, Ontario, Canada
It looks great so far!
Sounds like you just need to ditch that lattency and you are good to go.

My Jitter Fixer reads the low byte of the timer used to generate the interrupt as soon as it is entered.
Since we know that any AVR instruction can last between 1 and 4 cycles, this is the error that needs to be corrected, as we cannot know which instruction had just completed before the interrupt triggering.

So we compare the low byte of the timer to the expected "best case" value, which in the case of my posted asm snippet.
14 cycles represents the total of all cycles rquired to get to the actual compare being done...

Code:
4 : Cycles required to actually enter the interrupt
5 : Cycles needed to save the status reg
5 : Cycles needed to do the compare and first branch


From there the differece between a "true" compare state and "false" compare state ballance out the lost cycles.

I have defeated Mr. Latency on an AVR 2 other ways as well, which may be more C friendly...

1) Keep your graphics loop quick enough to not last more than one frame and then issue a sleep command.

This will put the AVR in a known state so that there is no cycle imballance when entering the interrupt.
The difficlty here is that you are almost "chasing the beam".

This old demo of mine does that...

https://hackaday.com/2018/03/08/racing- ... an-attiny/


2) Use a second timer and compare the value before your sync is issued.

Similar to the balanced delay of reading the actual interrupt timer, you do a short delay based on the value of a second free running time that is initially reset in your startup code. The issue there is a wasted timer, and that the C compiler monkey may optimize your delay loop out.

I can certainly take a poke at your code sometime and see what I can do.

Just for eye candy and possible future color expansion ideas of your project, here is an XMega managing 256*240 with 256 colors. All video generation is done in software with no external help. All graphics and audio jammed into program memory...

https://www.youtube.com/watch?v=CXFOTpM2Jn4


Cheers!
Brad


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 Post subject: Re: 65c02 at 16Mhz
PostPosted: Tue Mar 19, 2019 8:12 pm 
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Oneironaut wrote:
It looks great so far!
Sounds like you just need to ditch that lattency and you are good to go.

My Jitter Fixer reads the low byte of the timer used to generate the interrupt as soon as it is entered.
Since we know that any AVR instruction can last between 1 and 4 cycles, this is the error that needs to be corrected, as we cannot know which instruction had just completed before the interrupt triggering.


OK, so I added this into my video generator right at the start of the ISR:

Code:
  asm ("        lds r16, %0" :: "n" (_SFR_MEM_ADDR(TCNT2)) ) ;
  asm ("        cpi r16,14") ;
  asm ("        brlo AVRC_FIX1") ;
  asm ("AVRC_FIX1:") ;
  asm ("        cpi r16,15 ;1") ;
  asm ("        brlo AVRC_FIX2 ;1/2") ;
  asm ("AVRC_FIX2:") ;
  asm ("        cpi r16,16 ;1") ;
  asm ("        brlo AVRC_FIX3 ;1/2") ;
  asm ("AVRC_FIX3:") ;


and it might have worked if I'd not appeared to have made a slight error on the PCB and I've transposed to pins on the ATmega side of things. I may give it a go back on my stripboard version, just to prove that it works, however doing this reminded me of how many cycles on the ATmega I'm losing and how much RAM that I'd been using as buffers and a ramdisk for my filing system. Recovering those pins will let me use I2C and an SPI bus too.

Oneironaut wrote:
So we compare the low byte of the timer to the expected "best case" value, which in the case of my posted asm snippet.
14 cycles represents the total of all cycles rquired to get to the actual compare being done...

Code:
4 : Cycles required to actually enter the interrupt
5 : Cycles needed to save the status reg
5 : Cycles needed to do the compare and first branch


From there the differece between a "true" compare state and "false" compare state ballance out the lost cycles.

I have defeated Mr. Latency on an AVR 2 other ways as well, which may be more C friendly...

1) Keep your graphics loop quick enough to not last more than one frame and then issue a sleep command.

This will put the AVR in a known state so that there is no cycle imballance when entering the interrupt.
The difficlty here is that you are almost "chasing the beam".


There is no real "graphics loop" - once the 6502 is booted, the ATmega is sitting in a tight loop, waiting for the 6502 to send a message then it executes the command - serial out, draw a line, open a file, write data, ...

Oneironaut wrote:
Just for eye candy and possible future color expansion ideas of your project, here is an XMega managing 256*240 with 256 colors. All video generation is done in software with no external help. All graphics and audio jammed into program memory...

https://www.youtube.com/watch?v=CXFOTpM2Jn4


Cheers!
Brad


It looks good, but I'm really going to use a bit of a blob for colour graphics - a nice little $5 system that I've been using for a number of years now so I already have some nice graphics and gpio code written for. All I need is a bus interface with level shifters (it's a 3.3v device). This is a solved problem though.

So my 6502/65816 will be piggy in the middle with the ATmega doing disk IO, serial, I2C, SPI on one side and the tiny little $5 SBC on the other side doing screen, keyboard & mouse .. Not much different to using the TI99 system, a microcontroller, that fancy RAM, or an FPGA solution really...

Cheers,

-Gordon
(edits to fix the quoting)

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Gordon Henderson.
See my Ruby 6502 and 65816 SBC projects here: https://projects.drogon.net/ruby/


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 Post subject: Re: 65c02 at 16Mhz
PostPosted: Wed Mar 20, 2019 12:20 am 
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Look forward to seeing the progress.

You may need to tune the compare value since you are using inline.
If you are patient, just start at say 10, and work up until all jitter is gone!

Brad


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