So I know I keep stacking questions on questions, but I generally ask something, do more work (sometimes switching to a different task if the question is critical) and end up with more questions. But I'm hoping this one is simple enough

The primer says to use 0.01uf bypass caps that are ceramic multilayer or monolithic. I've found these which are super cheap and seem to meet the requirements. Do I need to bypass every power connection? (i.e. every vcc and gnd connection on every chip, meaning quite a few caps for say, the 65SPI, which has a bunch of ground connections). The primer mentions to bypass power and ground, does this mean to have one cap at VCC to GND or a cap at both VCC and GND (sort of related to last part of this question).

I'm planning on running a ground plane on the bottom side of the board, I don't think that a power plane will be possible on the top side though.

Also, I saw "OS-CON" capacitors mentioned quite a bit, should they be used for my big caps? (at the 12v coming onto the board, and the 5v for main logic) or will electrolytics do the job?

Put one cap near each power pin. There is no need for caps near ground pins. The type that you linked to is a good one to use. You don't need a power plane on top. If you have 2 layer board, put a ground plane on both sides, and just route some fat traces to each power pin/cap.

Thanks for the quick answer, this is what I thought, because when I'd been doing some remedial work with arduino that was the practice, I wasn't certain if I needed more because of how sensitive these are.

Any ideas on the OS-CON capacitors mentioned in the primer?

The OS CON caps are better, but they are more expensive, and the selection is smaller. Unless you're building a high quality industrial project, I would just get the cheaper electrolytic ones.

Alright, that sounds fine to me. Is about 470uF good for each rail? (12v, 5v, and 5v going to display for the backlight)

Most likely good enough, unless you're going to do some high current switching.

Probably not, and if I do, I'll put caps on the boards that are doing it. (already have some ideas to build a logic analyzer board on top of this, among some other things). The display draws about half an amp max, and that's fairly constant, that's actually the reason I gave it its own regulator, because I was worried about hitting the max of the first (it's a TSOP package, so could be 1a or 1.5a depending on the model, but I may need heatsinks too)

You'll very likely need or want to respin, which is to say run a second design, either a fixed one or an expanded one. So, I'd advise (again) against thinking of this as a one-shot experiment which needs to have all the features and all the expandability.

It might be that this advice will never be taken, but I have to try! It may be that a person has to make a first board before they realise they do want to make a second, and then later realise that this was fully expected by everyone else at the time...

You can learn a certain amount in the design phase, but you learn a lot more in the build and debug phase. Getting to that phase means making something. Only after you've gained that extra knowledge will you be well-placed to design what you really want. And it might take a few more revisions. How to get started with your first time around the loop? Make something simple!

So, I would advise you make a thick file of notes of all the advanced ideas, and then see what's really absolutely needed for a bringup of a 6502 with RAM, a ROM and a serial port.

Whatever you do, I'm sure you'll enjoy the journey. But be aware of all the people who never quite got started on the journey because the train station was so fascinating.

I do fully intend on making more. This has opened my eyes to a lot of neat stuff I can make, getting into digital circuits, and I think that's why I'm so excited about adding more stuff to it.

I'm trying to keep it simple enough, but also have enough stuff on it to keep me interested in it, whilst designing a second one. As far as a very simple bring up, I may do out a very simple computer schematic as a back up, in case I can't get this one working for whatever reason, and a simpler one could probably be made on my CNC just fine. I kind of understand what you mean though, that if I get stuck looking at an amazing looking schematic, and maybe even an amazing looking pcb layout, but never do anything with it, I really haven't learned anything about actual hardware design.

It's funny, this exact thing happens to a lot of my programming projects, I'm certain your familiar with the term "feature creep", and the usefulness of "feature freezes". At this point, I've been trying to force myself into a feature freeze so I can actually get everything worked out. The RTC is the last thing I'm going to look at adding to this, and that's only because I think the RTC should be pretty easy to add (there's even SPI ones!).

I actually do have a question though, I noticed that in Garth's simple computer schematic (which I've been using on and off as a reference) he uses shcmitt trigger nand gates, he mentions needing it for the reset circuit, but he uses them for address decoding as well. I just placed the reset circuit down in my schematic, and used the same nand gate that he's using in his, there are two problems though.

A: I've got a bunch of wasted gates on that chip, that will be left unconnected since the rest of my logic is fleshed out with other gates.
B: do I need the schmitt trigger circuits elsewhere? I seem to remember reading they're only needed for the RESET circuit....although I don't remember why (probably time for another re-read of the primer).

EDIT: after re-reading the reset circuits section I think I understand now, and I'm going to switch out my circuit for a ds1813, to save space

You should tie unused inputs to ground. Having open CMOS inputs can float to halfway point where they will consume more power and possibly interfere with rest of circuit. Also, tying them to ground instead of any other point helps to extend the ground plane.


Schmitt triggers are more noise resistant, which is helpful for any kind of asynchronous signal like a RESET. You can use them for any signal where you expect noise (e.g. long wires/external connections), or places that are particularly sensitive to noise. If you have left over Schmitt trigger gates, you can use them for regular purposes too.

I was able to remove it since I'm using the ic for reset now, is there anywhere I should be inspecting to possibly replace gates? Garth mentioned on his circuit for a simple computer that they're a bit slower than other gates, so I'm hesitant to just change everything, especially if noise isn't much of an issue (which I don't anticipate it to be with the processor bus.)

Also, I think I knew about tying inputs to ground, I had just forgotten about it, because I had some of my spare gates already like that. I'm going through and making sure the rest of the spare gates have their inputs tied to ground right now.


The last part that I'm thinking about here is VPA and VP\. I'm considering qualifying IO reads with VPA as well as VDA, because now that I have EEPROM behind SPI I may be getting program addresses from it. Unfortunately, this means adding another gate delay for an OR gate, and a lot more wasted gates (I don't want to do one of the tiny SMT style or gates, I'd rather have the DIP package). As far as VP\ goes, iirc it goes low when the processor is pulling data from vectors, i.e. ISR, and RST, is it useful for qualifying anything?

If there's no particular reason, I wouldn't use schmitt trigger inputs. Also, you learn more by discovering a noise problem and solving it properly rather than throwing in schmitt trigger prematurely.

You can do clever things with the VPA, VDA, and VP signals, but you don't normally need to.

Presently, I've been using VDA to qualify all IO access, I've added VDA (both behind an or gate which adds about 8ns of gate delay iirc) so that I can access things like EEPROM behind it, which may have program addresses. VP\ I have no idea how to use, as in, I'm not sure how it could be useful. It tells me that the CPU is jumping to a vector but I'm not certain what I can do with that information outside the CPU.

An unrelated question to everyone here: I'm looking at doing cartridges for the different games I plan on making for this, I'm going to have the cartridges behind SPI (might run some parallel from one of the VIAs to it too, but probably not) so it doesn't need a lot of pins, but I'm planning on 20 to give myself some room on it, and so that the cartridge slot isn't dinky and weak. I've been looking on mouser at card edge connectors but A: I'm not certain if some or any come with the "edge" side that would go on the cartridge PCB or if I just need to make the traces extend to the edge of the cartridge PCB in my layout. There seems to be plenty of through hole vertical card edge connectors though, so I have a wide selection to choose from, I'm just not sure what will work, if there's a standard, and how to use said standard. I'm doing some reading on my own about it, but if anyone has 2 cents to throw in it's appreciated.

EDIT: I should say, I'm still planning on holding off on video and audio, and putting those on daughterboards. I mainly want to have the cartridge connector so I can try it out, load some programs from a cartridge and all that, and learn how to use it before the final rendition of this project.

Not sure what you mean by program addresses? I know EEPROMs have successfully been used in Beebs, and there's no VDA there at all.

The only thing to watch out for, AIUI, is writes to an EEPROM, which will perturb subsequent reads for a while, whether or not the EEPROM is soft-locked. If this is a worry, you can add a mechanism to block writes, even a switch. But you don't need it.