I believe my problem is getting more and more complex. But I do not intend to give up. So thank you very much for the support you are giving me here. I'm very happy with that
Dr Jefyll wrote:
Attachment:
The attachment LA trace detail.PNG is no longer available
I'd like to know why A0 is high for the first opcode fetch after reset.
Supposedly the data bus is hardwired to $EA. Or maybe I've misunderstood what it is you're doing. But if the bus is $EA then the reset vector is $EAEA. In other words, $EAEA is where the first opcode fetch should occur. But in that case A0 should be
low.
Something isn't right. Either that's not A0 we're looking at, or else data bus pin d0 is high (rather than being tied low as it should be).
hitlp, is it possible you've gotten the order of the data-bus pins reversed? D0 is pin 33; D7 is on pin 26.
I reversed the pins of the data bus. The result is in the image "schema6.PNG".
Dr Jefyll wrote:
What about the solderless breadboard you're using? Is it worn, perhaps, and failing to make a good connection on all the IC pins?
I'm thinking of this hypothesis too.
Dr Jefyll wrote:
(Finally, someone asked earlier about the power supply. Can you confirm that you have 5 volts, as measured right at the IC pins?)
J
I'm using a power supply. I find it difficult to be variation but I will measure with the multimeter to validate.