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PostPosted: Sat Nov 10, 2018 4:01 pm 
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I'm trying to get the WDC 65C51 to work, however I'm having some issues getting anything from TXD. I know about the hardware bug in the status register, and i'm just using a DELAY_6551 routine I found somewhere on this forum just to test things.

When I measure the XTLO pin with my scope, I see a nice 1.84mhz oscillator signal. When I measure XTLI i see 2.5ish volts but no oscillation. Is this correct? Considering the naming of the pins, I expected to see a signal on XTLI instead (as in I for Input?)?

I've also tried putting the 27pF cap on pin 7 instead, and I even tried removing it completely. Both didn't change anything.

Maybe it's expected behavior, but I'd like to make sure before I continue in my search to figure out my txd isn't working.

Thanks!


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PostPosted: Sat Nov 10, 2018 4:17 pm 
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Can you post your initialisation code?

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PostPosted: Sat Nov 10, 2018 4:23 pm 
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Ofcourse. I've tried various things for the command register, mainly surrounding bit 0 (DTR) and bit 2 and 3 (TIC), as I was unsure about them.

edit: I should point out that I am indeed running my 65C02 with 2mhz.

Code:
; Latest WDC 65C51 has a bug - Xmit bit in status register is stuck on
; IRQ driven transmit is not possible as a result - interrupts are endlessly triggered
; Polled I/O mode also doesn't work as the Xmit bit is polled - delay routine is the only option
; The following delay routine kills time to allow W65C51 to complete a character transmit
; 0.523 milliseconds required loop time for 19,200 baud rate
; MINIDLY routine takes 524 clock cycles to complete - X Reg is used for the count loop
; Y Reg is loaded with the CPU clock rate in MHz (whole increments only) and used as a multiplier
;
DELAY_6551   PHY      ;Save Y Reg
         PHX      ;Save X Reg
DELAY_LOOP   LDY   #2    ;Get delay value (clock rate in MHz 2 clock cycles)
;
MINIDLY   LDX   #$68      ;Seed X reg
DELAY_1      DEX         ;Decrement low index
         BNE   DELAY_1   ;Loop back until done
;
         DEY         ;Decrease by one
         BNE   MINIDLY   ;Loop until done
         PLX         ;Restore X Reg
         PLY         ;Restore Y Reg
DELAY_DONE   RTS         ;Delay done, return
;


nmi
    rti 
irq
    rti

__reset
    ; Init STACK
   LDX #$FF
   TXS

    ; Init acia
    ; 19,200 baud, 8-bits, 1 stop bit
   LDA #$1F
   STA $4403 ;ACIA_control
   LDA #$0A
   STA $4402 ;ACIA_command

LOOP
   LDA $4401 ;ACIA_status.. <-- not sure if the status reg must be read?
   ;AND #$10 ; <-- Doesn't work on the WDC, since the bit is stuck, delay instead.
   ;BEQ LOOP
    JSR DELAY_6551
   LDA #$41
   STA $4400 ;ACIA_data
    ;JSR DELAY_6551
   JMP LOOP

; Interrupt vectors   
.ORGA $FFFA
.dw nmi
.dw __reset
.dw irq


Last edited by robindegen on Sat Nov 10, 2018 4:33 pm, edited 1 time in total.

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PostPosted: Sat Nov 10, 2018 4:32 pm 
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On my SXB I initialise with
Code:
                lda     #%00011111              ; 8 bits, 1 stop bit, 19200 baud
                sta     ACIA_CTL
                lda     #%11001001              ; No parity, no interrupt
                sta     ACIA_CMD
                lda     ACIA_RXD                ; Clear receive buffer

Personally I would have taken /RTS & /CTS to the header and jumpered them together if they aren't being used for flow control.

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PostPosted: Sat Nov 10, 2018 4:38 pm 
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Thanks. Unfortunately initializing like that hasn't helped. The TXD still stays high permanently.


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PostPosted: Sat Nov 10, 2018 4:46 pm 
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I'd go back to basics. Remove the chip and check for shorts.

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PostPosted: Sat Nov 10, 2018 5:07 pm 
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Once you initialize the chip, you should see the baud clock output on pin 5. I would check for that vs scoping the xtal itself, as you may be loading the xtal circuit with the scope probe. Also, CTS needs to be active (low is active) otherwise the TxD line will be marking high.

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PostPosted: Sat Nov 10, 2018 5:13 pm 
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floobydust wrote:
Once you initialize the chip, you should see the baud clock output on pin 5. I would check for that vs scoping the xtal itself, as you may be loading the xtal circuit with the scope probe. Also, CTS needs to be active (low is active) otherwise the TxD line will be marking high.


Aha! I indeed don't see the baud clock on pin 5, it's just high permanently. This gives me something to investigate further. Thanks!


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PostPosted: Sat Nov 10, 2018 6:16 pm 
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Chances are you either have a bad crystal or perhaps your 1M resistor is out of range or not making a connection on both leads. I've used the latest WDC W65C51 (with the xmit issue) and interrupt-driven receive works fine. I also use the following routine to initialize the chip:

Code:
INIT_6551
               SEI   ;Disable Interrupts
               STZ   SIOSTAT   ;write to status reg, reset 6551
               STZ   STTVAL   ;zero status pointer (Page Zero pointer)
               LDX   #$02   ;Get count of 2
INIT_6551L
               LDA   LOAD_6551-1,X    ;Get Current config parameters for 6551
               STA   SIOBase+1,X   ;Write to the 6551
               DEX   ;Decrement count
               BNE   INIT_6551L   ;Loop back until done
               CLI   ;Re-enable Interrupts
               RTS   ;Return to caller
;


Note that the data loaded in my case is: $1F, $09
For your config, I would probably use: $1F, $0B (%00001011)

Hopefully you can get the problems resolved and report back.

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PostPosted: Sat Nov 10, 2018 9:36 pm 
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It appears that xtal1 is grounded. Is that typical for a crystal circuit? What I've seen usually is a crystal between xtal1 and xtal0 with resisters and capacitors in diagrams. Never mind. I see figure 20 in WDC's 6551 datasheet. Maybe the 1 MOhm resistor is in the wrong place?

Cheers,
Andy


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PostPosted: Sun Nov 11, 2018 7:55 am 
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BitWise wrote:
Can you post your initialisation code?

Also, please post your schematic in monochrome.

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PostPosted: Mon Nov 12, 2018 6:11 pm 
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BigDumbDinosaur wrote:
BitWise wrote:
Can you post your initialisation code?

Also, please post your schematic in monochrome.


Sure. Thanks for your response. Here is the schematic in black and white.

I'm currently in the processes of checking each individual pin connection. If that's OK i'm going to try putting it on a logic analyzer to see what is actually being send it's way.


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PostPosted: Mon Nov 12, 2018 6:55 pm 
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Thank you all very much for your input. I have managed to find the problem. The 27pF cap was bad. Ouch...

If this cap is not connected to pin 6, apparently the entire chip does not function as expected at all, even though I can measure a 1.842mhz signal on pin 7, it just won't work. After replacing the cap, pin5 started outputting the baudrate like floobydust suggested.

I am not yet able to receive 100% correct data (an occasional character is bad), but i'm pretty sure this has more to do with the delay loop in the software.

Also for reference in case anybody is wondering: It's normal to see the oscillation only happen on pin 7. The WDC just uses confusing naming of pins if you ask me. XTL1/XTL2 would have been better. I think the only reason they're called that is for the external clock.


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Last edited by robindegen on Mon Nov 12, 2018 7:10 pm, edited 1 time in total.
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PostPosted: Mon Nov 12, 2018 7:09 pm 
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This may or may not help but I thought I would mention my experience with the 65C51.

I have tried every schematic I can find and I have no idea, but I have never been able to make it work with a crystal. Maybe my breadboards are bad/crap. Maybe my crystals aren't great or wrong type. I don't know what the issue is.

But lately, I decided to get a half-can oscillator of the required frequency and guess what....it started working!

I literally pulled the crystal and caps/resistors out of the breadboard (using different configs) and plugged in the oscillator and it worked.

So I don't know what my deal was...but now that I'm using the oscillator, it works perfectly.

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PostPosted: Mon Nov 12, 2018 7:40 pm 
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robindegen wrote:
Thank you all very much for your input. I have managed to find the problem. The 27pF cap was bad. Ouch...

If this cap is not connected to pin 6, apparently the entire chip does not function as expected at all, even though I can measure a 1.842mhz signal on pin 7, it just won't work. After replacing the cap, pin5 started outputting the baudrate like floobydust suggested.

I am not yet able to receive 100% correct data (an occasional character is bad), but i'm pretty sure this has more to do with the delay loop in the software.

Also for reference in case anybody is wondering: It's normal to see the oscillation only happen on pin 7. The WDC just uses confusing naming of pins if you ask me. XTL1/XTL2 would have been better. I think the only reason they're called that is for the external clock.


Try looking here for some sample code that works with the latest WDC part... it includes a separate delay routine which is easily changed for clock timings:

viewtopic.php?f=4&t=2543&start=30#p29795

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