I have written a virtual w65c02s in JavaScript: https://github.com/inindev/apple2e/blob ... w65c02s.js
(I am the guy who reported the errors in the w65c02s datasheet to Bill Mench causing the October 2018 update.)

It lead me down the path of booting an Apple IIe ROM, then eventually having enough to actually load .dsk files: https://inindev.github.io/apple2e

It is still a work in progress, but I thought I would share it with the community.

John Clark

Very nice, thanks for sharing! I've added it to the big list here. What kinds of tests have you already run (and passed)?

>> What kinds of tests have you already run (and passed)?

My original inspiration came from http://6502asm.com and became interested in the implementation to refresh my 6502 programming skills (I stopped messing with the 6502 when I built my Heath Zenith 8086 in 1985). Once I began playing with the javascript, I started fixing bugs, and straightening out inconsistencies here: https://github.com/inindev/6502asm/blob ... cpu6502.js

As I dug, I decided doing a ground-up implementation would be more straight-forward (and more fun), plus be something I called my own. To avoid transcription errors, I exported the tables from pages 27-29 from the Nov 11, 2016 Western Design Center w65c02s datasheet into Excel, then into CSV format where I pasted it into javascript. The first issue I hit were mistakes in the datasheet itself.

All three errors were located on Page 29 as follows:
1) TAY is listed with mode 3 opcode "BC" and mode 8 opcode "AB".  TAY only supports mode 8 opcode "A8".
2) TRB is listed with mode 3 opcode "5E".  This is incorrect and should be deleted.  Also note that the TRB mode 1 opcode written as "IC" (letter I, letter C) and should be "1C" (number 1, letter C).
3) TSX is listed with mode 3 opcode "1D".  This is incorrect and should be deleted.


A gracious Bill Mench thanked me and they were able to produce the October 08, 2018 datasheet addressing these issues in quick order.

Once I finished the CPU implementation, I wanted to test it with real code, so I tried all of the programs found here: http://6502asm.com/examples

I quickly discovered an issue with my DEC and INC. I was setting the carry flag, but you are not supposed to: https://github.com/inindev/65c02_emu/co ... 1532afef3b

Once I had done that, all programs I found on that site worked:
https://inindev.github.io/65c02_emu/tes ... s.brickout
https://inindev.github.io/65c02_emu/tes ... .adventure

With this, I assumed it would be easy to load Apple ROMs and run them too: ftp://ftp.apple.asimov.net/pub/apple_II ... 20ROMs.zip

And in fact it was! I was pretty excited at this point, and wanted to run actual Apple disks. This is where the easy part ended. I spent months reviewing historical tech references to figure it all out.

I have run no formal test suites, but running Apple software has empirically shown me a variety things that are just not clear in the documentation.

>> What kinds of tests have you already run (and passed)?

Actually, I did write a few here mainly to test the memory modes and jumping as they were tricky to be sure I got right:

https://inindev.github.io/65c02_emu/test/?and.abs
https://inindev.github.io/65c02_emu/test/?and.abs_x
https://inindev.github.io/65c02_emu/test/?and.abs_y
https://inindev.github.io/65c02_emu/test/?and.imm
https://inindev.github.io/65c02_emu/test/?and.zp
https://inindev.github.io/65c02_emu/test/?and.zp_x_ind
https://inindev.github.io/65c02_emu/test/?and.zp_x
https://inindev.github.io/65c02_emu/test/?and.zp_ind
https://inindev.github.io/65c02_emu/test/?and.zp_ind_y

https://inindev.github.io/65c02_emu/test/?dec.abs
https://inindev.github.io/65c02_emu/test/?dec.abs_x
https://inindev.github.io/65c02_emu/test/?dec.accum
https://inindev.github.io/65c02_emu/test/?dec.zp
https://inindev.github.io/65c02_emu/test/?dec.zp_x

https://inindev.github.io/65c02_emu/test/?jsr.abs


John Clark

That's good! I recommend Klaus' suite - only a couple of emulators, to my knowledge, passed first time.

See
https://github.com/Klaus2m5/6502_65C02_functional_tests

and see also
http://visual6502.org/wiki/index.php?ti ... stPrograms
for other ideas.

Welcome, John, and thanks for posting. In particular I'm glad to be made aware there's a new version of the '02 datasheet available.

Visiting the WDC site I noticed there's also a newly revised '816 datasheet. I just downloaded both, and many forum members may wish to do the same.

cheers
Jeff

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Unfortunately, the '816 data sheet still has some errors—see page 27 for a major goof. If someone with no prior experience with the '816 tried to develop a system from only the information in the data sheet they'd be in for a rough time.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

Oh, yes, welcome, John!

What's the goof on page 27?

It specifies voltage and current for PA, PB, CA1, CA2, CB1, and CB2 which are in the VIA not the processor (and the VIA is not even WDC's version), and IRQA\ and IRQB\ which I think are from yet another IC, also power dissipation in microamps instead of milliwatts. Perhaps there's more I haven't noticed yet.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

It appears that's been fixed in the latest version - issued November 9th 2018, just yesterday!

Funny how that works.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!