We've had a fair amount of discussion of this subject. Some that come to mind are:

• http://forum.6502.org/viewtopic.php?f=4&t=4310
• http://forum.6502.org/viewtopic.php?f=1&t=4946
• and the first page of viewtopic.php?f=3&t=4403
• and one from 15 years ago, viewtopic.php?f=1&t=39

There have been a few private-message and email topics on it too. A few of us have hopes of pulling it off; but since we're not trying to hit a market window, and my own work goes in waves and I'm in a big one right now, and another is building a house and shop, and other factors, it remains just plans so far.

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Thanks for leading me to http://sbc.rictor.org

I'm very far away from being comfortable with even thinking about verilog and FPGA stuff, but I guess that if I want to build my own GPU that's the path I would have to take.

I wish there was some open-source GPU hardware in existence?

I'm probably going to buy a RR-Net for my breadbin and learn to code network stuff on that with assembler first to see how far I get.

Thanks for the friendly dialogue and sorry to barge in here like I know anything.

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MOS

Just to note, previous posts found that while the 65C02 parts are made in 0.6u process, the hard core can be made in 0.35u.
viewtopic.php?p=35660#p35660

It is interesting to fiddle with these numbers:
The original 8µ NMOS was guaranteed to run @ 1 MHz but usually could go faster, some even officially declared to be 2 MHz parts. 8µ/0.6µ = 13.333. The current WDC65C02 is rated to run @ 14 MHz. And some forum member (I'm too lazy to seek who) claimed to run his one @ 24 MHz. This looks like the acceleration is proportional to size shrinkage. As 8µ/0.35µ yields nearly 23 a 25 MHz CPU would be standard, some of them may perhaps reach 40 MHz.
Sounds good - if there weren't this nasty thing called physics that penetrates any efforts to maintain that speed between the peripherals and the CPU

The 65C816 used in the old Creative Micro Designs (CMD) SuperCPU cartridge for the Commodore 64 and 128 was operated at 20 MHz, and that was 20 years ago.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

I would buy one of those and run it at maybe 10mhz just so I could have more time for address decoding.

Currently (W65C02) tADS is 30 ns (max). If my assumption would be correct this would drop to roughly 15 ns. Would these 15 ns really help you?

They could help if using programmable logic instead of discrete gates.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

Originally, to be sold as 1MHz parts, they had to work in Mensch's hand-made tester at 2MHz; to be sold as 2MHz parts, they had to work at 4MHz; etc.. Bill Mensch had ones in the 70's running at 10MHz which was nearly unheard of at that time. (It would not have gone over well though if it worked in his 2MHz tester at room temperature but with almost no margin and then a customer counted on 2MHz and ran it in a warm environment and it crashed regularly.)

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

RISC-V, MIPS, and OpenSPARC are all open designs with commercial intent. RISC-V is working on coming to market, I think there was a recent announcement that a phone maker was going to start using RISC-V in some of their handsets.

Just more evidence with experience, and the falling cost of design and availability if open FABs for production, companies start taking this kind of work internally rather than working with the open market for components.

Save for the Intel Chips, all of Apples CPUs are internally designed. We will very likely see laptops with Apple chips in them within the next couple years, and possibly desktops.