Hi, qwertykeyboard
qwertykeyboard wrote:
it doesn't start at EAEA, but a little bit higher than that. Why is that?
In fact it *does* start at $EAEA but you're not seeing that very first cycle because this procedure you're using is slightly misguided: "It does 2 clock cycles before reading off the address bus since 2 clock cycles are needed to complete the NOP instruction." Instead, try reading off the address in the first cycle. Here's why.
With 65xx processors all opcodes are a single byte, and sometimes an instruction will have one or more operand bytes following the opcode. For performance reasons the processor always follows the opcode fetch with a fetch of the following byte, and often this saves time. NOP is one of the exceptions, however, as there are no operand bytes following the opcode. But the extra fetch happens anyway.
So! After having fetched the Rest Vector the CPU goes to $EAEA to find its first instruction. It fetches the byte at $EAEA, which is the opcode. It then fetches the byte at $EAE
B while the NOP completes its execution. But this fetch is actually pointless because there's no operand. After the NOP has completed the CPU will go looking for the next opcode... at $EAEB! IOW it fetches that same byte again. This same pattern repeats endlessly, with the address bus incrementing after the 1st, 3rd, 5th cycle and so on. I hope I explained that so it makes sense!
-- Jeff
Thanks for the input. But, what I'm trying to figure out is how many clock cycles does it take to initialize (after boot up or after the reset was pulsed) to actually start executing the first instruction?