Hello,

(first a little about me: This is my first post to this forum. I'm in my early 30's. I've grew up programming Apple IIes in 6502 asm in the 80's; then I moved to 8088 on an IBM XT in the 90s. I mainly write C++ code today. I know how to use a soldiering iron and I'm not afraid to use it! I've designed several SBCs when I was young, but never had the resources to build any of them.)

I wish to build my own single board computer based on the 6502 and related chips. I intend to build a 1MHz version on a bread board and then deign and build a faster one on a real PCB, probably using expressPCB or equivilent. I do have an ultimate goal of building a special purpose computer to solve a particular problem that will involve reading data from a compact flash device (and booting from it), and controlling some Class-II lasers and a laser positioning system using some digital to analog conversters hung off the end of a 6522 (or two).

If I wish the second system to run the fastest avialable 6502 at its best speed (10 or 14 MHz?), what things must I handle in my design? For example,

1) Should I use 74ls series chips for my address decoding and what not, or should I use 40xx series?

2) Can the 6522 and 6551 even handle 10 or 14MHz P2 clock? What is a good source for high speed version of these chips? (western design cetner's web site only lists prices for the 6502 and 65816).

3) What about eeprom and ram that can handle these speeds? (I was hoping to use something like the 2864 EEPROM and 61256 RAM).

If the bus speed is 10MHz, then the clock cycle is 100ns. Should my memory have a better response rate than 100ns, or is 100ns "good enough"?

For my first system I plan to scavage parts. I've got all kinds of goodies from old devices, but they all run at 1 or 2MHz. (6502, 6502A, 65c02, 6522(A), 6551, 6116's, etc...)

It has been a long time since I've tried to compute bus timings and paper-test a design using the timing diagrams. Is that the "one true way" of getting into building my own system?

The answers to your questions are already in several other posts, but probably too spread out to be easy for a newcomer to find, especially when the search feature does not work very well.

I believe all the current-production WDC parts are marked for 16MHz, and with fast logic and memory and good design will top out around 24MHz at room temperature.

1.) 4000-series logic has its place (like where you need to interface to 12V stuff and speed is not critical) but it's much too slow for what you want to do. 74HCxx would be the minimum. 74ACxx is quite a bit faster. I don't use LS unless it's the only thing close and I can't get a CMOS part in time.

2.) WDC's 65c22 can definitely handle 16MHz, but their '51 is not in full production yet AFAIK. You can also go through the 65C22 and bit-bang an SPI interface though and use something like the MAX3100 16-pin UART which is generally quite a bit more capable than the '51. You can have a lot of serial parts like this without loading the processor's own buses.

3.) Memory speeds: Fast ROM is much harder to come by than fast RAM. What I might do for my next one is pre-load even the reset routine in RAM from a seriall EEPROM even before turning the processor loose. Then there will be no ROM in the processor's own memory map.

You'll need to hit the timing diagrams. 100ns clock cycle does not mean you can use 100ns memory. In fact, the Apple II which you referred to actually did two memory accesses per cycle, so the video could access the memory in the first half and the processor could access it in the second half. For RAM, you basically have to figure a 50ns memory-access time for 10MHz, and then deduct time for glue logic and processor set-up time; so I would go with nothing slower than 35ns for 10MHz.

http://www.6502.org/users/garth/projects.php?project=1

How should I design a clock circuit that can run at 1MHz or 10Mhz (or for the 65c02?

There are many ways to generate two clock signals:

a) 8MHz xtal, 1/2 74ls04 and a 74ls138 to give 1,2,4 and 8Mhz outputs.
b) two seperate xtals and a full 74ls04.

What I'm concerned with is how to properly switch the 6502 between the two signals. I assume that I can't just use a 2-1 mux and switch whenever... that I should transition when both clocks are either low or both high.

But I'm scratching my head on how to design such a circuit using minimal parts (I'd like to avoid PALs/GALs for now).

Garth, I read an article by you about switching an extra resister into an RC oscillator so that the system would run at 200KHz when "idle" and 1MHz when doing floating point math. However, I want more precision than an RC oscillator will provide.

Basically my idea is that the system will have 64K static ram capable of running at the top speed of the 6502 and its peripheral chips. The system will also have 4K or so EEPROM mapped at $f000. When the system boots I want to to run slow enough that it can shadow the EEPROM to the RAM, toggle a bit on a 6522 that would alter the address bus mapping to be 100% ram and either the same bit or a different bit to hike the clock speed. I would also map my IO chips (6522 x2 and 6551 or equi) at $f000 or $ff00 (in $10 increments). The cool thing is that when the EEPROM is mapped in, writes to its address space would actually go to the ram, so I can shadow it by just reading a byte and writing that byte back to the exact same memory location. This stuff is probably old school to you guys, but it seems nifty to me.

Waiting for the end of the month sucks. I promised myself and my wife that I wouldn't buy any parts until next payday (end of the month)... I need an EEPROM. I can't find my old on in my parts bin anymore. Maybe I'll rig some way of pre-loading my ram chip (2K 6116 for now) using a PC parallel port. But I'm short on shift register chips at the moment. Probably best in a different thread.

clueless, I've worked out schemes like this before, but I'll need some more rest before I can do it again or find the ones I've already drawn up. You have to be careful about glitches. kc5tja is good at this sort of thing and has a good way to draw and post diagrams. Someone else recently was asking us to review his very, very elaborate design for a 65816 computer, and I remember he had something to switch clock speeds. I just need to think of something that the search feature can use to find it.

If you only want to go 8MHz, 55ns ROM will work as long as it's not gated by phase 2. I'll still give it a good chance of working at 10MHz. In any case, you don't need to go as extreme as an 8:1 speed ratio. What I might do for my next computer is not even have ROM in the address map at all, but pre-load RAM from a serial EEPROM through a microcontroller before releasing the processor from reset.

Hello,
Please forgive my opening, but I simply cannot call you "Clueless"
whether it be tongue in cheek or otherwise :-)

I would like to suggest an alterternative.
The Western Design Center has offered two off the shelf single-chip
solutions for a number of years. One unit is 02 based ( W65C134 ) and the
other is 816 based ( 65C265 )
The convenient thing about both of these devices is that they each
have a dedicated Console serial line to a Mask ROM monitor which allows
for test program up/download, register modification and such.
A minmial system can be put together with two clock sources, and a serial
line with RS232 signal conversion. You don't even need to add RAM in
the beginning as each device has enough on board to get you started.
I am not suggesting that this is the optimal way to get started,
but it would let you concentrate on code familiarization / tryout without
having to troubleshoot code & hardware at the same time.
Over the years I have built up a couple using the 265. The
latest one, I have even operated at 8Mhz with no trouble on a wire-wrapped board.

Good Luck,

Wally

When I signed up on this forum I couldn't think of a good name to use. I am a member of a gaming clan (Castle Wolfenstein, Enemy Territory, "Clan Wrath") and there I go by the name "Clueless Newbie", as I was when I joined. (I'm a better player now). Given that I have a gazillion accounts at different internet site, each with a unique password, I wanted to stop trying to remember all of my user names. I should probably change my username here, but I haven't thought of a good name to use yet.



Interesting. I had read about the 6502 based microcontrollers but didn't put much thought into them. For my official project it would make sense to try one. But I think that I still want to build my own SBC using a good old fashioned 65c02 and support chips.

For my laser project I figure that I need to drive two D/A converters (X/Y position control), a compact flash memory card, read a few push buttons, have a serial port console, and a few bits of output to control things like switching the laser LED on and off, the power for the D/A output amplifier, etc... I will review the data sheet for the "W65C134" and see how many bits of I/O I can get out of it.

I am just trying to build a small laser / light show thingy for my company to use in a trade show booth. This is just a project for fun. Writing financial software all day long gets kinda boring.

Thanks for the insight.

It wasn't me, but I am also working on a 65816 CPU board for my computer (see http://www.6502.org/users/andre/csa/ ) with a fixed clock ratio between the bus (1MHz) and the '816 (8MHz). When the CPU accesses the bus, the RDY lline is used to halt it appropriately. I am mostly done with the schematics, but it'll take time until I get it finished.

André

I've used the following circuit for switching the clock speed of a 65C02 between two non-synchronous clock sources. It seems to work perfectly, at least it has never crashed my system yet.


I built it using AC logic to keep the propagation delays down, because I had devices synchronised to the sources of the clock signals and the processor had to synchronise to these. If you are just using it to select one of two clock signals, you could use HC instead.

The first '74 is the port that is written to to select the clock speed. It's D input should be driven by one of the CPU data lines. Its clock input should be driven from the system address decoders, gated with the Ph2 clock from the CPU.

I've used the 4 gates in a 74AC00 to form a selector gate. You could also use an and-or arrangement, using the spare gates in the '08, or you could use something like a 74HC157. I found the '157 had a VERY long propagation delay, although this might be because I had a bad chip, it was far worse than the worst case spec on the data sheet.

The circuit holds the clock input to the CPU low for 2 cycles after a clock switch. This ensures that you don't get a short clock cycle immediately after a clock switch. Since it forces the clock low when it is already low, you don't get any nasty glitches either.

Hope you find it usefull.

Cool. Thanks.