creoguy wrote:
Completed building up a 6502 SBC using this design.
https://github.com/chrisabird/sbc65I assembled his test code using cc65 to test out the VIA and the ACIA and they are working fine. I can modify the VIA code and can adjust the ACIA baud rate without any issue so the SBC appears to be fine. After verifying all that I assembled the OS (EhBASIC 2.22) and enter in the normal Hello World test, but I can't get it to actually run anything. With "10 PRINT "HELLO WORLD", I get the follow message, "Type mismatch Error in line 10" when I attempt to run it. With "PRINT 1 + 1" the unit locks up and I have to reset.
Any suggestions on what to check next?
A pox on schematics in color!
After printing the schematic in monochrome and examining it, I see several things worthy of note.
hoglet wrote:
The first thing to that comes to mind is the Ram's WE signal is directly driven from the 6502's R/W, and the Ram's chip-select select signal is gated with Phi2.
I concur with Dave. You want the RAM selected
before Ø2 goes high (ditto for ROM). The RAM's
/WE input should be gated with Ø2, and RAM's and ROM's
/CS should not. Similarly, the RAM's and ROM's
/OE inputs should be gated by Ø2 to avoid ambiguous data bus conditions during a write cycle. Dave's link points you to a circuit that will meet these requirements using a single chip.
WDC does not recommend the use of the
PHI1OUT and
PHI2OUT clock signals in new designs. These signals lag
PHI2 (Ø2) by an unspecified amount. All timing in the MPU is referenced to Ø2. Using the
PHIxOUT clocks for other devices means they will lag the MPU's internal clock by an unknown amount that will vary from one MPU to the next. Obscure timing issues are bound to arise.
Speaking of clock signals, your clock generator circuit isn't illustrated in your schematic, but should be a "can" oscillator whose output fully swings between ground and Vcc. The WDC 65C02 and 65C816 are somewhat persnickety about clock quality. WDC recommends the use of a can oscillator, not a crystal.
Your schematic specifies 74LS glue logic, which is TTL-compatiblenot CMOS compatible. You should be using CMOS glue logic, such as 74HC (good to 8-10 MHz) or 74AC (good to at least 20 MHz).
The DS1813 attached to your reset circuit is drawn as though it is a transistor. It is not a transistor.
In the future, I recommend you also use a DS1813 on NMI, along with a suitable pullup resistor, so you can use NMI to break a loop in a "stuck" program. I did that on my POC V1 design and it saved my bacon more than once when I accidentally sent the MPU off into the wild, blue yonder.