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PostPosted: Mon May 28, 2018 8:00 am 
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Hello Everyone!

About 40 years ago, my parents bought an OSI C2-4P (I think) for me at Christmas, because I really got into the Interdata 7/16 Mini at school.
15 years ago, I was stupid and gave it away, really kicking myself!

So I have purchased a Mensch Microcomputer (dont know what to do with it, very limited in my eyes) and am playing with an L-Star purchased on Tindie.

My very first stupid question is, what is the difference between a W65C21 PIA and W65C22 VIA? They seems fairly similar in function, except for the timers on the VIA. Perhaps rephrasing the question to "When would I use the 6521 over the 6522, or 6522 over the 6521?"

I also have an Altera DE10 Lite laying around, with 50K LE's. How many LE's do some of the 6502 Verilog implementations occupy?

I was always into writing software more than the hardware side, but I want to learn more, and the articles here are very informative.

Thank you, in advance, for any responses to my first of many questions.

Walter


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PostPosted: Mon May 28, 2018 8:05 am 
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It seems likely that the PIA was an earlier product than the VIA, and is more limited entirely for that reason. Or they might have taken the VIA, and made the PIA as a cheaper version by removing the timers.

These days, the cost difference is irrelevant. Use a VIA unless you need a PIA to repair an existing machine.


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PostPosted: Mon May 28, 2018 9:05 am 
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I don't know how I missed this before. Anyway, here's some discussion on it: viewtopic.php?f=12&t=4455&p=51332#p51332

I think the only reason to use a 6520 or '21 is if you already have it in a board or have software already written for it. Otherwise, the '22 is a better part.

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The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?


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PostPosted: Mon May 28, 2018 10:25 am 
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The progression was something like this: MOS 6520 PIA / 6522 VIA / 6526 CIA. Those timers on the VIA probably doubled the chip complexity, or perhaps a bit more, but they absorbed a bunch of TTL you'd otherwise need on your board. So a VIA would have been much more expensive than a PIA, if there was a time when both were available. As chip processes improved, the PIA becomes uneconomic and not a good choice for new designs.

Of course, if you have parts for free, or want to be retro-authentic, you might choose the simplest part which does the job.


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PostPosted: Mon May 28, 2018 2:27 pm 
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First: welcome Walter!

The 65(C)21 is a simple PIA, parallel in/out only and IIRC with handshake capabilities. It requires 4 bytes in the memory map.
The 65(C)22 is named VIA to underline its extended capabilities: beside the same two parallel ports with handshake control you get 2 timers with various modes (e.g. external pulse counting) and a shift register that supports a couple of modes and is a cheap way to expand the IO capabilities using shift registers. The VIA requires 16 byte mem space.


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PostPosted: Mon May 28, 2018 3:14 pm 
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Oops, yes, of course: welcome, Walter!


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PostPosted: Mon May 28, 2018 6:02 pm 
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Yes, welcome.

I'll repeat an important portion here from the topic I linked above:

    Another disadvantage I found the ['20 and] '21 PIA has compared to the '22 VIA is that access to the data-direction registers on the PIA is only indirect, requiring more instructions, making it pretty clumsy to emulate open-drain outputs when needed. The way to to it is to set the output register's bit to a 0 and then change the data direction, so that even in "output" mode, sending a 1 is accomplished by making the pin an input so the external pull-up resistor can bring the line up. (The output register bit is left as 0.) This is valuable for example when bit-banging an I²C or PC-keyboard interface. The VIA is much more efficient at this. (I probably should put something about that in the 6502 primer. I make little updates all the time. The above comments make me think I should also add a section about programming EPROMs and EEPROMs.)

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?


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PostPosted: Mon May 28, 2018 7:01 pm 
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Wow! Thank you all for your responses! I know I found an nice home (on the web) while I am home (4-6 weeks due to a Microdiscectomy)

Awesome!

Walter


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PostPosted: Thu May 31, 2018 2:06 am 
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Welcome, Walter!

And if you want to be the first to build an expansion board for my L-Star project, be my guest! Your prize will be eternal fame and fortune(*).

===Jac

(*) Fortune not included


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PostPosted: Thu May 31, 2018 3:49 am 
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walter.preuninger wrote:
...while I am home (4-6 weeks due to a Microdiscectomy)

Urk! My back is hurting just thinking about it. :shock: Hope recovery brings you relief. Back pain is no fun.

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PostPosted: Sat Jun 02, 2018 11:40 am 
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I am surprised how good my back feels. I have had 2 instances of sciatica within 2 months. My general practitioner prescribed steroids and a lose weight recommendation. Went to a specialist and after 1 MRI he stated that L4-L5 were herniated so bad that even shots in my back would not work. My parents have a farm in East Texas that my wife and I go to almost every chance we can, and I need to be able to jump onto and down from the tractor, without worrying if I am going to be in pain later that day. Thank you all!

Jac, I have tried to send you a couple of PM's, but they are not going thru, so....

I accept your challenge, but it is going to be a slow process. I can't even get an astable 555 blinky LED circuit to blink, even after wiring a bread board exactly as shown on several websites.

It appears that there are about as many ways to wire a 555 in astable mode as there are to solve a programming problem.

I have reached out to an Admin to get PM privileges.


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PostPosted: Sun Jun 03, 2018 7:40 am 
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walter.preuninger wrote:
I also have an Altera DE10 Lite laying around, with 50K LE's. How many LE's do some of the 6502 Verilog implementations occupy?


That's pretty big! You can fit a whole 6502 system in 8k - not that logic element counts are directly comparable between the various manufacturers, but being within a factor of two is good enough here. When an FPGA has enough on-chip RAM you don't even need to figure out how to use the off-chip RAM on your board, which is a help. At a later point you can expand into that.

We had a core comparison thread a while back, but again the message on how big a 6502 is comes out adequately clearly even for today's much larger chips:
viewtopic.php?f=10&t=1673


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PostPosted: Sun Jun 03, 2018 7:59 am 
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Grant Searle's multi comp fits a 6502 (or z80/6809) plus the controllers for ps2 keyboard, VGA display, serial and SD card, into a cyclone 2 EP2C5. Which is more like 5k LEs then 50k.


http://searle.hostei.com/grant/Multicomp/index.html


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PostPosted: Sun Jun 03, 2018 8:05 am 
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A great place to start - thanks!


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