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 Post subject: Re: game machines
PostPosted: Fri Apr 13, 2018 8:29 pm 
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ttlworks wrote:
Speaking of TTL chips, Marcel van Kervinck's Gigatron project is quite impressive:
custom TTL CPU (34 TTL chips) which is generating a VGA picture.

Thank you :-)


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 Post subject: Re: game machines
PostPosted: Fri Apr 13, 2018 10:30 pm 
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BigEd wrote:
Defender is a great example. I fear that if you build the best sprite engine, you'll only get sprite based games, and so much more is possible. A flexible DMA engine might be a more useful addition to a 6502 machine. A video system which allows for overlays - where there are two framebuffers and the concept of a transparent pixel - is another kind of thing which is much easier in hardware than software.


Yeah, multiple layers are certainly a must, though I would still prefer multiple layers of tiled graphics as opposed to bitmaps, for this class of machine. Bitmaps just take up too much memory and too much bandwidth to draw to them. You're generally going to be drawing the same things over and over onto them, so why not just use tiles/sprites?

With plenty of sprites to go around, they tend to be attached together into any shape you want, so you're not limited to squares. You can do interesting transitions with them coming together/apart, fake zooming, etc, pretty easily, without "redrawing" anything. You can redefine tile definitions & palette entries to change a LOT of onscreen pixels without the CPU or blitter having to do barely anything.

Let's think about 60fps 2d dynamic & animated gaming, at 320x200, in 256 colors, with framebuffers + blitters. Per frame, the video DAC will take 64,000 + 768 bytes of read bandwidth. Considering overdraw, let's be conservative and say a DMA blitter will have to take around 200,000 total reads & writes to redraw the screen with everything at its new position & animation frame. At 60fps, that's ~16MB/sec of bandwidth dedicated to video, if the DMA channel is kept busy (if there's idle time, you'd start to miss frames). However, this is just 1 layer with only about 50% overdraw. For each overlay, that'd be another 3.7MB/sec just to read it, assuming a layer can stay static (which is kinda boring), and if it's dynamic that can double the blitter bandwidth to keep it updated.

The C64 does what it does with around 1.1MB/sec of video bandwidth; the CPU constantly pushing around bitmap data would add only fractions. The Amiga Chip RAM has 7-14MB/sec to do everything (video, audio, I/O), and at 60fps has to resort to panning around static low-bpp bitmap overlays without updating them too much even with a blitter. It's hard to find specific info on the SNES, but I would guess its video system is 3.58MHz * 16bit = 7MB/sec for its dedicated video memory (including idle windows for DMA access from the CPU side, so still 7MB/sec total).

If you're going to have shared memory, and you want fully dynamic 60fps blitter-based 320x200x8bpp graphics, on an 8-bit data bus compatible with the 6502, I would say that you need a pretty fast bus, let's say 40 MHz. The CPU would take half the bandwidth, even if you stretch a 10MHz 6502 across 4 bus cycles, leaving the next 4 to the fast video stuff, or 20MHz 6502 sharing every 2 bus cycles, so 20MB/sec bus access is given to the blitter and video. But again, that's just for a 1-layer output.

It just doesn't make sense to me with this class of hardware. For constantly expanding PC hardware in the 386 to Pentium days where the CPU can push those things that quickly to a non-shared framebuffer, no problem. The Amiga and ST really couldn't do this stuff well, but a lot of that is chalked up to planar graphics besides lack of quickly-updated tiles. Home 2d consoles were all sprite-based, not blitter-based. Arcade hardware that I'm familiar with for pushing a lot of huge 2d stuff around at these sorts of resolutions (Street Fighter 2, Neo Geo) are all composite sprites, though the later ones (Y2K+) are modern texture blitting GPUs even for 2d since they're actually fast enough.

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 Post subject: Re: game machines
PostPosted: Sat Apr 14, 2018 12:06 am 
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Finding this thread interesting.
Quote:
A flexible DMA engine might be a more useful addition to a 6502 machine.

What should the DMA engine be able to do ? One task I can think of is moving tiles around. Meaning the DMA engine would have to know what a tile was. The trick to the DMA would be minimizing the overhead of programming it for moving small objects around.
A couple of well picked custom instructions could also be valuable. For instance for defender a "load eight bytes" and "store eight bytes" instructions.
Quote:
Yeah, multiple layers are certainly a must, though I would still prefer multiple layers of tiled graphics as opposed to bitmaps, for this class of machine. Bitmaps just take up too much memory and too much bandwidth to draw to them. You're generally going to be drawing the same things over and over onto them, so why not just use tiles/sprites?
I agree. Tiles are a good way to handle graphics. With enough different tiles available for the screen it could be difficult to tell the difference between a tiled screen and a bitmapped one. If the tile index were 10 bits an entire 40x25 screen could be tiled with different tiles. With 16 bit tile indexes a large background map can be made.

With more recent technology it aught to be possible to improve upon the graphics for even a low end game machine. To get more bandwidth, the memory could be made wider for DMA / display operations. I've got to believe that much better graphics are possible with a new machine, for instance a 14MHz 65816 running a 14MHz bus rather than 1MHz.

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 Post subject: Re: game machines
PostPosted: Sat Apr 14, 2018 1:06 am 
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As an aside, the Defender design was used for a couple of games (Defender, and it's sequel Stargate), but for later games (e.g. Robotron 2048 - with huge numbers of moving characters) they modified the base design to add a hardware blitter to offload pixel moving from the 6809.

From the Multi Arcade Machine Emulator (MAME) sources https://github.com/mamedev/mame/blob/master/src/mame/drivers/williams.cpp document the blitter registers:
Code:
    CA00 start_blitter    Each bits has a function
          1000 0000 Do not process half the byte 4-7
          0100 0000 Do not process half the byte 0-3
          0010 0000 Shift the shape one pixel right (to display a shape on an odd pixel)
          0001 0000 Remap, if shape != 0 then pixel = mask
          0000 1000 Source  1 = take source 0 = take Mask only
          0000 0100 ?
          0000 0010 Transparent
          0000 0001
    CA01 blitter_mask     Not really a mask, more a remap color, see Blitter
    CA02 blitter_source   hi
    CA03 blitter_source   lo
    CA04 blitter_dest     hi
    CA05 blitter_dest     lo
    CA06 blitter_w_h      H  Do a XOR with 4 to have the real value (Except Splat)
    CA07 blitter_w_h      W  Do a XOR with 4 to have the real value (Except Splat)
And if you're curious about how the display and blitter worked, you can see the emulation source here: https://github.com/mamedev/mame/blob/master/src/mame/video/williams.cpp.

BTW, if you've never heard of MAME https://mamedev.org, it's an emulation project (first released in 1997) for old arcade machines and home compulters. It includes an enormous number of CPU emulators, and every variation of CPU you've likely heard of. It even has emulators for old florescent tube hand-held machines. Even if you don't have ROMs (which are copyrighted) there's a lot to learn (and use) in the open source emulator.

So the 6809 was good... but developers grew beyond it pretty quickly.


Last edited by sark02 on Sat Apr 14, 2018 1:16 am, edited 3 times in total.

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 Post subject: Re: game machines
PostPosted: Sat Apr 14, 2018 1:07 am 
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I do think a bitmap has its uses. But tiles and sprites would also make extremely powerful additions to the graphics engine of such a device. Options are good, right?
Yes, bitmaps eat a chunk of RAM, but if we're using the '816, we've got 16 MiB max to play with. I think a 64 KiB block or two or three out of even four megs(I'm thinking of Garth's modules here) isn't too much to set aside for the graphics subsystem.
It might be better to use 4 MiB of general-purpose RAM and then put the graphics memory on top of that(because it might need to be something special like a dual-port one or in an FPGA).
If you set aside an extra page or two on top of that, and put the sprite and tile control stuff in there, it sounds to me like you'd have something fairly powerful on your hands.


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 Post subject: Re: game machines
PostPosted: Sat Apr 14, 2018 1:23 am 
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DerTrueForce wrote:
I do think a bitmap has its uses. But tiles and sprites would also make extremely powerful additions to the graphics engine of such a device. Options are good, right?
Back around 2002 I got into writing (hobby) games for the Nintendo Gameboy Advance. The GBADev site https://gbadev.org has documentation for the device, which uses a multi-layered tile-based screen. As I recall, each screen location held a 16-bit tile descriptor consisting of a 10-bit tile index (1024 tiles) and various control bits (e.g. x-flip, y-flip). Hardware scrolling, and even some kind of transformation matrix for the screen to allow for both rotation and isometric playfield. Lots of sprites, with hardware scaling. DMA sound.

It was immense fun. On that site, check out "CowBite Virtual Hardware Specifications" if you'd like to know more.


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 Post subject: Re: game machines
PostPosted: Sat Apr 14, 2018 1:34 am 
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This is slightly off-topic, but possibly a bit relevant: http://www.the8bitguy.com/2576/what-is-my-dream-computer/


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 Post subject: Re: game machines
PostPosted: Sat Apr 14, 2018 3:45 am 
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Hmm, I'm going to revise my numbers above. Most paletted bitmap systems would pull palette information per pixel, in case it's changed as the raster moves. So that'd be 64000 pixel bytes per layer, plus 3*64000 palette bytes, or 15.6MB/sec plus 3.8MB/sec per additional layer. This can be avoided by keeping the palette as 768 registers on-chip, but that might be excessive in both I/O addressing space and chip footprint.

So the bandwidth situation is even worse than I initially posted. It really is the major constraining factor of graphical performance.

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 Post subject: Re: game machines
PostPosted: Sat Apr 14, 2018 3:51 am 
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That's probably the reason they used RAMDACs in VGA boards. They could then just map that into the memory, alongside the bitmap.


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 Post subject: Re: game machines
PostPosted: Sat Apr 14, 2018 5:15 am 
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DerTrueForce wrote:
Why not simply use the existing '816? Even without the extra opcode, a Forth like you describe is still possible. A little more work would be involved, but it's still possible. And you're not risking any kind of legal trouble that way.

Lots of things are possible --- that doesn't mean that they are a good idea --- the result would be "a Forth like what I describe," except 3 or 4 times slower.

William D. Mensch specifically designed the 65c816 to support C. He doesn't want me to write a Forth for the 65c816 --- he wants me to use C --- he wants to attract the C programmers, and he doesn't care if I am a C programmer or not as there are already a million C programmers in the world (a veritable clone army!).

If I write a Forth for the 65c816, using a contorted scheme to work around the lack of Forth support, the result is going to be slow.
Then all the C enthusiasts will laugh and say: "You are a big Forth expert, but your Forth code is 3 or 4 times slower than C code, so this proves that Forth is inherently slow."

If a soft-core version of the 65c816 came out with an OSX prebyte (similar to on the M65c02A) then I would want to write a Forth for it (especially if it were used in a game-machine and so there was use for it). Forth needs support for two stacks --- C only needs support for one stack --- if there is no support for two stacks, then Forth code is going to be slow.

If the game-machine used an off-the-shelf 65c816 (as DerTrueForce suggests) then I would not consider getting involved at all.

The 65c816 isn't the only option for a game-machine. The M65c02A could be upgraded. Lets give it an 18-bit address bus, so it supports four 64KB banks:
  • main-bank --- this is where the application data is, and also the machine-code
  • thread-bank --- this is where the threaded code is --- any memory access through IP goes to this bank
  • alternate-bank --- we have a new addressing-mode (Y) that accesses this bank --- presumably the 16-bit version of Y would be used
  • display-bank --- this bank is where the frame-buffer for the video is (as DerTrueForce said, 320x200 with 256 colors needs 64000 bytes) --- there is a FLP (flip) instruction that flips the display-bank and alternate-bank for double-buffering
This seems like a pretty reasonable design. Forth primitives would need maybe 16KB of the main-bank for machine-code, leaving 48KB for application data. Forth threaded-code would get a full 64KB bank, allowing huge programs to be written.

The game-machine would involve an 8-bit processor in the spirit of the 6502, with 256KB of memory and video.
The performance of the game-machine would not be as good as an ARM Cortex with 256KB of memory. The goal however, is not to build a super high-performance game-machine --- the goal is to build a game-machine in the spirit of the C64, Atari 2600, etc., that teenagers could program in assembly-language and/or Forth.

I think of Forth as being an overgrown macro-assembler. In Forth you get to do meta-compiling (write Forth functions that execute at compile-time and generate code that will execute at run-time). C doesn't have this feature. This feature is mostly useful if you have access to a Forth assembler and can generate machine-code primitives. An argument could be made that Forth can be implemented on the ARM Cortex, and the 32-bit processor provides better performance than an 8-bit processor such as the M65c02A --- the counter-argument is that teenagers aren't going to learn ARM Cortex assembly-language (I'm not enthusiastic about learning ARM Cortex assembly-language either).


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 Post subject: Re: game machines
PostPosted: Sat Apr 14, 2018 6:02 am 
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sark02 wrote:
BTW, as far as processor comparisons go, whereas the Z80 and 6502 were direct competitors, the 6809 came out after those two and was much more expensive... according to Wikipedia being released over 3 years after the 6502 and containing almost 3x the number of transistors. I think it's ok to grant that it's more powerful than the 6502 without diminishing the 6502 in any way. The expense of the 6809 was a key reason it never really got anywhere in the home computer space (the home micros that did use it were not popular). If you're building an arcade machine, though... then you have the budget.

The 6809 is a great target for Forth! :) The U stack seems to have been designed specifically for supporting the Forth data-stack. STC (subroutine-threaded) Forth code can be quite fast --- the downside is that the code can be quite bloaty (the M65c02A code is bloaty too, and for the same reason: almost every instruction has one or more prebytes).

I wonder if there is a soft-core 6809 available.

There is a lot more 6809 legacy code available than 65c816 legacy code.
  • The 65c816 was used in the Apple-IIgs, so there might be some legacy code from that. The 65c816 was also used in the Super Nintendo and there won't be any legacy code from that because it was all proprietary to Nintendo.
  • The 6809 has the OS9 operating-system. Whether that is applicable to a game-machine, is dubious, but it might be. The 6809 was used in the Color Computer and there might be some legacy code from that. The 6809 was used in some arcade game-machines, but that code is proprietary.
To make the 6809 useful for a game-machine, there would need to be some way to access multiple 64KB banks. Here is a suggestion for an 18-bit data-bus:
  • code-bank --- this is where the machine-code is --- also, the direct addressing-mode accesses this bank
  • data-bank --- all the other addressing-modes access this, unless the Y register is used as a pointer
  • alternate-bank --- this is accessed if the Y register is used as a pointer
  • display-bank --- this is where the frame-buffer for the video is --- there is a FLP (flip) instruction that flips the display-bank and alternate-bank for double-buffering
Note that it is okay for the DP register (direct addressing) to point to the code-bank rather than the data-bank. The only way this could mess up legacy code is if the legacy code uses other addressing modes to access memory that is in the direct-page. This is very unlikely --- the whole point of the direct page is that it is only accessed with the direct addressing-mode --- the direct page is where all of the global variables are.

The problem with this scheme is that legacy code won't run because the legacy code assumes that Y is in the main-bank.
This problem could be fixed by adding a Z register and making the Z point to the alternate bank, but having everything else access the data-bank. That should allow legacy code to run unchanged, while still supporting access to the alternate-bank (through Z) that is needed for updating the video image.


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 Post subject: Re: game machines
PostPosted: Sat Apr 14, 2018 6:40 pm 
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Hugh Aguilar wrote:
If the game-machine used an off-the-shelf 65c816 (as DerTrueForce suggests) then I would not consider getting involved at all.
What level of additional involvement did you have in mind?

These discussions are interesting to me as I enjoy hearing how other people approach the problem, what their preferences are, etc. Seems there are opinions on frame buffers vs. tiles, standard vs. customized CPUs, DMA, bit depth, sound generation, etc. It's all hypothetical, of course, and I wouldn't expect it to go further. Producing an actual consumer-level product (nicely packaged), even at Kickstarter levels, would take $100,000s+.

As a reference, take a look at the ZX Spectrum Next Kickstarter https://www.kickstarter.com/projects/1835143999/zx-spectrum-next. This project aims to evolve the ZX Spectrum design - producing a size and connector-compatible board that can be installed into old the classic 1982 case and operate as a classic Spectrum, and also operate in more advanced modes. The project is also producing a beautiful new all-in-one keyboard case. This raised a little over $1,000,000 by 3,113 backers. They produced and shipped the board, and are working on the new case. There's a lot of nostalgia in the ZX Spectrum community, as that device was hugely popular in the UK (it was my first computer) so finding backers wasn't hard. There have been a number of successful Spectrum kickstarters by both competent and shady developers... the community keeps the faith.

The stumbling block for a few of these projects is manufacturing and plastics (esp. the latter). Producing a quality custom case appears ridiculously complicated such that even experienced mechanical engineers struggle to make schedules... yet the results can be breathtaking. Compare to yet another FPGA board... People always seem to be producing these things, but they lack the appeal and user-friendliness of a finished product.

It would be quite an accomplishment to develop a non-trivial consumer-level design for the 6502... esp. if backwards compatibility with a nostalgic reference wasn't part of the project (meaning no existing library of software titles). An advanced C64 or Atari 800 might garner as much support at the Spectrum kickstarer (esp. a C64 on as it was more popular), but a new, unique design might be a challenge. There may be legions of people with nostalgic love for their first 8-bit computer, but I'd suspect the vast majority never got past BASIC. I'd expect 80+% didn't get past LOAD, and perhaps only 1-2% got to assembly. Of those, how many would like to revisit it...?

According to Wikipedia there were 12,500,000 C64s sold, so even 0.5% capture would be 62,500... but that would still be extraordinary.

Gauging interest is what Kickstarter and Indigogo can help with. Start a project, promote it on as many relevant hobbyist sites as you can, and see how many people respond to the idea. Here was a project on Indigogo - a "6502 decompiler" (huh...) https://www.indiegogo.com/projects/6502-decompiler-project#/.

Looking at your posting history, Hugh, it looks like you've been working on a handful of different things. Maybe you're like me - I tend to bounce around - things grab my attention, occupy my time for a while, and then I'll find something else. But if you'd like to do something real then these platforms might help you take an idea to the next level, with backers and funding.

Good luck.


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 Post subject: Re: game machines
PostPosted: Sat Apr 14, 2018 7:17 pm 
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Quote:
I wonder if there is a soft-core 6809 available.

There is a 6809 core by John Kent at

http://www.fpgadesignprojects.com/

There is also a 6809/6309 core on opencores.org.

And of course there's my own at: https://github.com/robfinch/Cores/tree/master/rtf6809
I got as far as almost getting FIGFORTH to work on it. The core supports 32 bit addresses with "far" prefix bytes. The core also has a 32 bit data bus and occasionally uses wider (16 bit) bit data accesses.

Quote:
William D. Mensch specifically designed the 65c816 to support C.
A C machine usually has lots of registers. The 816 would still be a difficult to port C but easier than the '02.

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 Post subject: Re: game machines
PostPosted: Sat Apr 14, 2018 8:04 pm 
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cbmeeks wrote:
The way the C64 did sprites was far superior to any other 8-bit machine I've ever heard of. [...] However, 8 sprites per scanline was high-end for the day. It's dirt simple to create a crude sprite multiplexer on the C64 to get dozens of 24x21 pixel sprites all over the screen.
While it was indeed straightforward to get a proof-of-concept multiplexer going, programmers still struggled to build a high performance, production one. There's a great (free) e-book from Bob Pape, who wrote the award-winning arcade port, "R-Type" for the ZX Spectrum, which tells the story of its development.

In the book (downloadable from http://itsbehindyou.atwebpages.com/index.html) he talks about the programmers who were simultaneously working on the R-Type ports to other systems, including the C64. There are many youtube videos demonstrating the large circular rotating pattern of enemy ships that appear in the game, and the C64 programmer struggled to get his multiplexer glitch-free... eventually causing delays that lost him the Activision project. He was a competent programmer, and the alpha build of his version of his C64 R-Type can be found on the web. It's a shame that all the other work that went into the game was for naught. That's one professional games programmer who would have preferred more hardware sprites.


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 Post subject: Re: game machines
PostPosted: Sat Apr 14, 2018 9:30 pm 
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Hugh Aguilar wrote:
William D. Mensch specifically designed the 65c816 to support C.

It so happens that the '816 has some instructions and addressing modes that ease the implementation of a reasonably efficient C compiler. However, neither historical information or E-mail exchanges I've had in the past with Bill Mensch has ever suggested the primary focus in developing the '816 was to support C.

Mensch's objective was to satisfy a requirement of Apple by developing an MPU that could load, store and manipulate 16 bit words, and address more than 64KB or memory, as well as maintain 65C02 compatibility so older Apple ][ software could be run without alteration. Mensch did that and also took advantage of the balance of the available instruction matrix to implement some functions that are present in the Motorola 68000—the 65C816's PEA, PEI and PER instructions were essentially copied from the 68000. As it turns out, those instructions along other features, such as the stack relative addressing modes, greatly eased the difficulty of writing an efficient C compiler. However, that was a byproduct of the MPU's development, not a goal.

Quote:
If I write a Forth for the 65c816, using a contorted scheme to work around the lack of Forth support, the result is going to be slow.

According to Garth Wilson, Forth runs very well on a 65C802, which device is a constricted form of the '816—the 'C802 can only address 64KB and was meant to be a drop-in replacement for the 65C02. The '816 can address 256 times as much RAM as the 'C802, so if anything, a properly written Forth running on the '816 should be very fast.

Quote:
...the counter-argument is that teenagers aren't going to learn ARM Cortex assembly-language (I'm not enthusiastic about learning ARM Cortex assembly-language either).

I'm not sure why the constant argument about what teenagers will or won't do vis a vis a computer. The overwhelming majority of today's teenagers are not going to get involved with a hobby computer, let alone write something as complicated as a piece of game software with heavy graphics in assembly language—regardless of the MPU being used. Today's kids are into instant gratification, which they are not going to get doing bare metal software development. If it can't be readily done on a Raspberry PI or similar, they are not likely to do it.

During the "golden age" of home computers, which were much more accessible to the curious than contemporary hardware, only a fraction of teens who had ready access to a home computer actually wrote software from scratch. Even fewer were sufficiently savvy and motivated to program in assembly language. Today, only a small hard-core band of people such as us dig that deeply into computers. Most development today is high-level—even ANSI C has become passé for a lot of development as multi-gigahertz MPUs have made the overhead of running high-level languages unimportant. Succinctly stated, assembly language development has very much become a niche these days...mostly on small systems like we design and build.

To put things into perspective, when someone who works in the computer business happens to find out that I am fluent in assembly language they look at me in the same fashion as did the chimpanzees in Tanzania look at Jane Goodall when she arrived. Those of us who routinely program in assembly language and are comfortable with twiddling hardware register bits are alien folks to most people.

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