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 Post subject: Max Pullup value
PostPosted: Fri Mar 30, 2018 2:13 pm 
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I'm wondering what the maximum pullup resistor value is that I can use on the RDY,BE,IRQ, etc. inputs on an '816 ? I'm planning for battery operation so I'd like current draw to be minimal. The cpu will run at 1MHz initially, but perhaps as high as 8MHz.

I had a look at the spec. and it looks like input high voltage has to be at least 0.8 VDD (in this case 2.72V for a 3.4V supply).
Also the standby input current is 5uA. With 0.68V drop across the resistor and 5uA of current the resistor could be 136k. However this seems much too high.

I also have available only 1k, 2.2k, 4.7k, 10k, 22k, 100k resistors. Which is the best resistor to use ?

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 Post subject: Re: Max Pullup value
PostPosted: Fri Mar 30, 2018 3:13 pm 
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As I read the datasheet the maximum standby current is 1µA, the 5 is 5pF input capacitance. Anyway, the 1µA is the maximum current the input consumes in standby. You want to supply more current, not less. For CMOS I usually use 10k. This should allow for some distortion resilience while not loading VDD with too much current (.33mA in this case). I wouln't go higher than 47k (70µA) on externally otherwise unconnected pins for battery operation. Keep in mind, that the current is only relevant if the pins are pulled low internally or externally.

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 Post subject: Re: Max Pullup value
PostPosted: Fri Mar 30, 2018 4:15 pm 
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Rob Finch wrote:
I'm wondering what the maximum pullup resistor value is that I can use on the RDY,BE,IRQ, etc. inputs on an '816 ?

Will there be signals applied, or are these inputs unused? You can probably avoid pullup resistors entirely.

Any active-low input which is unused can simply be tied high... although a pullup may be preferable if you want the ability to temporarily apply a signal for debugging purposes. Current consumption is presumably a non-issue in that scenario.

IRQ circuits traditionally use Open-Drain logic (and a pullup), but that can be avoided with some of the more modern peripheral chips such as the W65C22S from WDC. Is this an option for you? The gate count might increase slightly.

(If you are forced to use Open-Drain logic, you'll need to concern yourself with the slow rise time of the RC circuit created. Higher-value pullup resistors degrade the rise time. See Garth's page here.)


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IRQB buffer.png
IRQB buffer.png [ 8.8 KiB | Viewed 4210 times ]

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 Post subject: Re: Max Pullup value
PostPosted: Fri Mar 30, 2018 6:37 pm 
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As Dr Jefyll already said unused inputs can be tied directly to GND or VDD whatever is appropriate. They should then draw no more than their max input current (otherwise they are damaged) but usually much less.

IRQ may be used, so if there are more than one client I prefer the old style open drain (open collector) way. But even 3V3/100K is 33µA which is pretty much current to get the line back to VDD as long as there isn't much (stray)capacitance to charge. Usually the IRQ service routine could manage to release the IRQ early and then process further. This would give a little more time to restore VDD there.

And your battery has to source the 33µA only when their is an IRQ pending. The other time their is only leakage current as for BE, RDY, etc.

The only reason to use lower value resistors I could imagine is due to EM sensitivity if necessary.


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 Post subject: Re: Max Pullup value
PostPosted: Fri Mar 30, 2018 9:25 pm 
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Quote:
Will there be signals applied, or are these inputs unused?

There will be signals applied.

The BE and RDY lines will be flipping around quite a bit. I'll try 47k then, I can always put more resistors in parallel then if it's too high a value. I guess what's to worry about is charging / discharging the stray capacitance and not the input current.

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 Post subject: Re: Max Pullup value
PostPosted: Fri Mar 30, 2018 11:13 pm 
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Rob Finch wrote:
I guess what's to worry about is charging / discharging the stray capacitance and not the input current.

100% correct. And that is what drains your battery edge by edge :evil:


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 Post subject: Re: Max Pullup value
PostPosted: Fri Mar 30, 2018 11:41 pm 
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From the data sheet, it looks like RDY is the only input that's not truly hi-impedance, as in having more than just the negligible CMOS leakage current. It does however say, "The RDY pin has an active pull-up and when outputting a low level, the pull-up is turned off to reduce power," meaning that if weren't using it, you could leave it disconnected.

Passive pull-ups are much to slow to use in fast digital work though, because of the RC time constant Jeff mentioned. Take for example your 47K, and suppose there's 22pF on that net, from the traces, IC inputs, sockets, whatever. That makes for a time constant of approximately a microsecond which is the entire period of 1MHz, twice as much as the phase-2-high time. (Time constant is the time it needs to go (1-1/e) times the voltage transition it would make given an infinite amount of time. 1-1/e is about 63%.) Taking that 47K down to 4.7K would divide the time by ten, which may still be too long even at 1 or 2MHz. This matter of the RC time constant is why the W65C22S has the totem-pole IRQ\ output. As you turn the clock speed way up, an open-collector output with pull-up resistor may not have the IRQ in solid "1" territory yet by the time the ISR is done. I got bit by this in the late 1980's—not that my clock speed was fast, but I used too high of a pull-up resistance, trying to save power in a product run on a 9V battery.

The pull-up is a suitable way to tie something that's usually unused to Vcc with the intention, as Jeff said, of leaving the possibility of pulling it down artificially for debugging purposes.

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 Post subject: Re: Max Pullup value
PostPosted: Fri Mar 30, 2018 11:57 pm 
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RDY is kind of a special case, but can't an ordinary gate or flipflop be used to drive BE? Unless you're using Open Drain logic (or 74LS series chips) to drive BE no pullup is necessary.

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 Post subject: Re: Max Pullup value
PostPosted: Sat Mar 31, 2018 1:32 pm 
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I have pullups on the BE, RDY signals so that the cpu board can run a NOP tester when disconnected from the system. There's actually weak pull ups and pull downs on the data bus which place EA on the databus by default.
I think it's possible to live with a slow rise time on the IRQ, NMI inputs. It will be several cycles before IRQ is enabled again in the interrupt routine.
The abort signal isn't being used, I may just jumper that high.
Anyways I will change the resistors to 3.2k (10k in parallel with 4.7k).

And dang-it, I forgot RDY is also an output, meaning it needs the open drain driver. I suppose I could avoid using the WAI? instruction in software.

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 Post subject: Re: Max Pullup value
PostPosted: Sat Mar 31, 2018 2:05 pm 
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Rob Finch wrote:
And dang-it, I forgot RDY is also an output, meaning it needs the open drain driver. I suppose I could avoid using the WAI? instruction in software.
Yeah, if you can avoid the WAI instruction you'll be fine. Are you worried about the risk that a crash could result in a WAI executing? If so, you'll wanna drive RDY with a gate that has an open drain output. Or, you could use BDD's trick of a Schottky diode on the output of an ordinary (totem pole, not open drain) gate.

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