Implementation of the decimal mode.
Implementation of the decimal mode.
This is (in my opinion) the hardest thing ever. I only know how to do Binary to BCD conversion, using the massive Double Dabble decoder, but the 6502 seems to be very small, same for the 4004 and both CPUs have decimal mode. Please help me with the implementation and theory.
Re: Implementation of the decimal mode.
I think this has been covered - the gate level design is in the patent. See the links in Ken Shirriff's article, for example:
http://www.righto.com/2013/08/reverse-e ... cimal.html
If you find other posts in discussions here, please link to them!
http://www.righto.com/2013/08/reverse-e ... cimal.html
If you find other posts in discussions here, please link to them!
Re: Implementation of the decimal mode.
BigEd wrote:
I think this has been covered - the gate level design is in the patent. See the links in Ken Shirriff's article, for example:
http://www.righto.com/2013/08/reverse-e ... cimal.html
If you find other posts in discussions here, please link to them!
http://www.righto.com/2013/08/reverse-e ... cimal.html
If you find other posts in discussions here, please link to them!
Re: Implementation of the decimal mode.
BigEd wrote:
I think this has been covered - the gate level design is in the patent. See the links in Ken Shirriff's article, for example:
http://www.righto.com/2013/08/reverse-e ... cimal.html
If you find other posts in discussions here, please link to them!
http://www.righto.com/2013/08/reverse-e ... cimal.html
If you find other posts in discussions here, please link to them!
Re: Implementation of the decimal mode.
What do you think? And why?
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White Flame
- Posts: 704
- Joined: 24 Jul 2012
Re: Implementation of the decimal mode.
LBSC wrote:
I only know how to do Binary to BCD conversion, using the massive Double Dabble decoder, but the 6502 seems to be very small, same for the 4004 and both CPUs have decimal mode.
Re: Implementation of the decimal mode.
White Flame wrote:
LBSC wrote:
I only know how to do Binary to BCD conversion, using the massive Double Dabble decoder, but the 6502 seems to be very small, same for the 4004 and both CPUs have decimal mode.
fixup logic on the normal adder, which is enabled in Decimal mode.
Re: Implementation of the decimal mode.
Please start reading about 6502 decimal mode here.
To make it short:
Imagine to have two 4 Bit ALUs instead of one 8 Bit ALU.
There is some circuitry at the output of a 4 Bit ALU, checking if the result from a BCD ADD\SUB isn't decimal.
If the result isn't decimal, the circuitry at the ALU output corrects the result... and the carry output.
Also, it might be helpful to take a look at some BCD test code.
Another idea would be to dig into the C source code of VICE (which emulates the NMOS 6502 on a PC).
And yes, BCD mode on the 6502 is a bit tricky...
Edit: Just to be fair, I felt a need to mention:
NMOS 6502 flag evaluation in BCD mode for NVZ checks the output of the ALU before it enters the correction circuitry. (So NVZ isn't valid.)
65C02 flag evaluation in BCD mode for NVZ checks the outputs of the correction circuitry. (So NVZ is valid.)
Take care.
To make it short:
Imagine to have two 4 Bit ALUs instead of one 8 Bit ALU.
There is some circuitry at the output of a 4 Bit ALU, checking if the result from a BCD ADD\SUB isn't decimal.
If the result isn't decimal, the circuitry at the ALU output corrects the result... and the carry output.
Also, it might be helpful to take a look at some BCD test code.
Another idea would be to dig into the C source code of VICE (which emulates the NMOS 6502 on a PC).
And yes, BCD mode on the 6502 is a bit tricky...
Edit: Just to be fair, I felt a need to mention:
NMOS 6502 flag evaluation in BCD mode for NVZ checks the output of the ALU before it enters the correction circuitry. (So NVZ isn't valid.)
65C02 flag evaluation in BCD mode for NVZ checks the outputs of the correction circuitry. (So NVZ is valid.)
Take care.
Last edited by ttlworks on Fri Nov 10, 2017 9:06 am, edited 1 time in total.
Re: Implementation of the decimal mode.
ttlworks wrote:
Please start reading about 6502 decimal mode here.
To make it short:
Imagine to have two 4 Bit ALUs instead of one 8 Bit ALU.
There is some circuitry at the output of a 4 Bit ALU, checking if the result from a BCD ADD\SUB isn't decimal.
If the result isn't decimal, the circuitry at the ALU output corrects the result... and the carry output.
Also, it might be helpful to take a look at some BCD test code.
Another idea would be to dig into the C source code of VICE (which emulates the NMOS 6502 on a PC).
And yes, BCD mode on the 6502 is a bit tricky...
To make it short:
Imagine to have two 4 Bit ALUs instead of one 8 Bit ALU.
There is some circuitry at the output of a 4 Bit ALU, checking if the result from a BCD ADD\SUB isn't decimal.
If the result isn't decimal, the circuitry at the ALU output corrects the result... and the carry output.
Also, it might be helpful to take a look at some BCD test code.
Another idea would be to dig into the C source code of VICE (which emulates the NMOS 6502 on a PC).
And yes, BCD mode on the 6502 is a bit tricky...
Re: Implementation of the decimal mode.
LBSC wrote:
what's the highest number you can store with 8 bit BCD? I think it was 99 but I'm not sure.
https://en.wikipedia.org/wiki/Binary-coded_decimal
Point is, that BCD (binary coded decimal) uses "chunks" of 4 Bits.
Each of the 4 Bit "chunks" only can be in the range 0..9.
A..F in a 4 Bit "chunk" won't be a "valid" number for BCD.
Re: Implementation of the decimal mode.
ttlworks wrote:
LBSC wrote:
what's the highest number you can store with 8 bit BCD? I think it was 99 but I'm not sure.
https://en.wikipedia.org/wiki/Binary-coded_decimal
Point is, that BCD (binary coded decimal) uses "chunks" of 4 Bits.
Each of the 4 Bit "chunks" only can be in the range 0..9.
A..F in a 4 Bit "chunk" won't be a "valid" number for BCD.
Re: Implementation of the decimal mode.
Also consider that, unlike binary addition and subtraction, decimal mode addition and subtraction are operations which work differently.
The best reference I've found is Bruce Clark's article which also precisely documents the flag results, and the differences between NMOS and CMOS 6502 handling of decimal mode.
The best reference I've found is Bruce Clark's article which also precisely documents the flag results, and the differences between NMOS and CMOS 6502 handling of decimal mode.
- barrym95838
- Posts: 2056
- Joined: 30 Jun 2013
- Location: Sacramento, CA, USA
Re: Implementation of the decimal mode.
As far as I know, you can handle SBC with legal BCD values by taking the nine's complement of the operand and falling through to a BCD ADC. What I don't know is whether or not using this method will provide results similar to the actual hardware for illegal BCD values.
Mike B.
Mike B.
Re: Implementation of the decimal mode.
Wow, lots of helpful comments. I'll keep mine short. In case it isn't already obvious, sometimes normal addition and BCD addition are the same thing. Eg: 1 + 1 = 2, either way.
Written in binary, that involves the following 4-bit chunks: 0001 + 0001 = 0010. That's valid binary addition and it also satisfies the rules of BCD addition.
The interesting part happens when the addition produces a sum which exceeds 1001 aka "nine". Nine is the biggest chunk BCD can express, so a fixup (which I won't describe) is required. But there's no fixup needed if the sum is nine or less.
Written in binary, that involves the following 4-bit chunks: 0001 + 0001 = 0010. That's valid binary addition and it also satisfies the rules of BCD addition.
The interesting part happens when the addition produces a sum which exceeds 1001 aka "nine". Nine is the biggest chunk BCD can express, so a fixup (which I won't describe) is required. But there's no fixup needed if the sum is nine or less.
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html
https://laughtonelectronics.com/Arcana/ ... mmary.html
Re: Implementation of the decimal mode.
(Slightly OT, but referring back to the original post and the possible slight confusion between Decimal Mode, which changes ADC and SBC behaviour, and the different problem of converting between binary and BCD, here's Wikipedia on that Double Dabble conversion method.)
Bit of a diversion: I think one of the thresholds in understanding computers is when you realise that bit patterns are just bit patterns, and those are all the values there are, and they only have meaning according to what you do with them. For example, 10011001 could be the Ö character, or the ™ character, or it could be the number 99, or it could be the number 153, or it could be the number -103, or it could represent the positions of 8 toggle switches, or mean 'light green' ... and for any of those numbers, of course the number might be a time, an angle, a volume, a distance, an amount of money, and so on.
Bit of a diversion: I think one of the thresholds in understanding computers is when you realise that bit patterns are just bit patterns, and those are all the values there are, and they only have meaning according to what you do with them. For example, 10011001 could be the Ö character, or the ™ character, or it could be the number 99, or it could be the number 153, or it could be the number -103, or it could represent the positions of 8 toggle switches, or mean 'light green' ... and for any of those numbers, of course the number might be a time, an angle, a volume, a distance, an amount of money, and so on.