1. The 6502 uses transparent latches - some people call these half-latches. You need two transparent latches, and a non-overlapped clock, to make a flip-flop. Many parts of the 6502 can be viewed as having pairs of half-latches like this, but many other parts of it place logic between the two latches. Sometimes you even get two half-latches in series clocked off the same edge. However, see for example
Arlet's 6502 in Verilog, it is possible to make something very like a 6502 but only using edge-triggered design.
2. Yes, 6502 workalikes have been made using memories to implement the logic. You can always use asynchronous memory to act as a look up table and perform logic. Indeed, that's how FPGAs work, inside, you have a huge number of small look up tables.
3. The
6502 uses ripple carry in the ALU. For the PC incrementer, there is a look ahead, so the low byte has a ripple, there's an FF detector, and the high byte has a ripple.
See also Andrew Holme's page:
viewtopic.php?f=10&t=4295See also [org]'s breakNES project, with reconstructed schematics of the 6502 implementation:
http://breaknes.com