Alarm Siren wrote:
Only in a very limited sense, in that sometimes the fetch of the next opcode is overlapped with the final part of the previous instruction.
It's slightly less limited than that. Note that two things happen in the cycle after the opcode fetch. The opcode is decoded and the byte following the opcode is fetched. This saves a cycle except in cases where the entire instruction is only one byte.
Both examples (mine and the one Alarm Siren cited) qualify as pipelining, I'd say, so I'm using the word differently than Tor would. Not saying he's wrong, though.
Alarm Siren wrote:
Also, I'm fairly sure the original Z80 wasn't pipelined either, at least not the ones from the 1970s.
Anyone interested in Z80 internal operation should have a look at Ken Shirriff's
Z80 articles, such as this eyeopener
The Z-80 has a 4-bit ALU. Here's how it works. -- Jeff
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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
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