I'm thinking that maybe the only way to have CS5B enabled in w65c265sxb could be burning in EEPROM the SXB hacker code, in $00:8004 address.
Then, test that everything runs fine there, and if it does, then put the 'WDC' string in $00:8000-3 so the next time the SXB boots, it runs directly the hacker.
But I actually don't know if the hacker code relies on any of the Mensch monitor routines, and do need to have it enabled for something.
I though about this once I read the boot process of the SXB, where...
265monrom.pdf wrote:
Code:
STATE #2 - "Check External Memory"
- "Enable External Memory"
- Set PCS7 to $30
(This turns on external chip selects: CS4 and CS5 from the W65C265S.)
- Check location $00:8000-$00:8002 for the string 'WDC', using CS4.
If the string is there, transfer control to USER program in EXTERNAL
MEMORY.
(JMP $00:8004)
CS4B would be the ROM area, and CS5B the complete 32, 128 or 512K of RAM in a single external chip, with no use at all of the internal ROM or RAM.
Of course, the SXB hacker code should take care of all the initialization the internal ROM does, because it's not being done once the SXB hacker kicks in early.
265monrom.pdf wrote:
Code:
STATE #4 - "Miscellaneous Initialization"
- Set PCS7 to $FB
(This turns on external chip selects: CS0,1,3,4,5,6, and 7)
- Start the fast clock. (Don't use it, just start it.)
- Initialize the RAM interrupt vectors.
- Delay while fast clock becomes stable.
- Switch to fast clock.
- Set Timer 1 for a 1 second interrupt (ToD timer).
- Enable T1 interrupt (but not the I bit yet).
- Set up pointers to the serial buffers in internal RAM.
- Calculate the fast crystal frequency by comparing it to the 32 KHz clock
crystal.
- Finally, check the Time-of-Day clock checksum.
If the clock checksum is valid, proceed to STATE #6.
Else perform additional initialization in STATE #5.
STATE #5 - "Initialize Time-of-Day Clock"
- Reset the Time-of-Day clock and reset the baud rate counters for the
serial port to the default values.
- Set up control port of serial UARTs.
- Proceed to STATE #6.
STATE #6 - "Enable interrupts/Output start-up message"
- Read the serial UART #3 port to clear any initial trash data.
- Enable interrupts. (CLEAR THE I BIT)
- Output the initial message to the console.
- Transfer control to the command interpreter.
What do you think?