This is how I do it:
The following CBM adresses are needed:
Code:
IORA = $E841 ; INPUT OUTPUT REGISTER A
DDRA = $E843 ; DATA DIRECTION REGISTER A
PCR = $E84C ; PERIPHERAL CONTROL REGISTER
IFR = $E84D ; INTERRUPT FLAG REGISTER
IER = $E84E ; INTERRUPT ENABLE REGISTER
IRQV = $90 ; IRQ VECTOR IN RAM
BACK = $E455 ; CBM IRQ CODE
The following subroutines to handle CB2 without touching the bits belonging to the system:
Code:
;SUBROUTINE TO SET CB2 HIGH
;BITS 7, 6 and 5 SET TO 1 AND BIT 0 TO 0
SCB2H LDA PCR
AND #$1E
ORA #$E0
STA PCR
RTS
;SUBROUTINE TO SET CB2 LOW
;BITS 7 and 6 SET TO 1 AND BITS 5 AND 0 TO 0
SCB2L LDA PCR
AND #$1E
ORA #$C0
STA PCR
RTS
Setting the CBM IRQ vector to point to my code:
Code:
SEI
;
; SET IRQ RAM VECTOR TO POINT TO "LL" INSTEAD OF TO "BACK"
;
LDA #<LL
STA IRQV
LDA #>LL
STA IRQV+1
CLI
This is my IRQ code to set CB2 high. Note that the CA1 Interrupt Enable must be reset, otherwise the IRQ will stay high and one gets an infinite loop immediately returning to "LL" after after "RTI". Then one has to jump to the CBM code where other possible causes for the IRQ are handled!
Code:
LL LDA #$80
BIT IFR
BEQ LL1 ;IF BIT 7 IS NOT SET THE INTERRUPT IS NOT FROM THE VIA
LDA #$02
BIT IFR
BEQ LL1 ;IF BIT 1 IS NOT SET THE INTERRUPT IS NOT FROM CA1
STA IER ;DISABLE CA1 INTERRUPTS (IFR FLAG REMAINS SET)
;SET CB2 HIGH, MEANING: "REQUEST NOT YET FULFILLED".
JSR SCB2H
LL1 JMP BACK
At the start the CA1 flag should be reset ant interrupt enabled:
Code:
LDA #$02 ;RESET CA1 FLAG
STA IFR
LDA #$82 ;ENABLE CA1 INTERRUPTS
STA IER
The following routine reads and writes bytes from the User Port:
Code:
;
;SUBROUTINE TO GET A BYTE FROM THE PC
;
;WHEN THE PC WRITTEN A BYTE A STROBE IS ISSUED
;
GB LDA #$02
GB1 BIT IFR ;READ IFR POLLING FOR DATA (NEG. EDGE "CA2")
BEQ GB1
LDA IORA ;READING CLEARS BIT 1 OF IFR
PHA
LDA #$82 ;RE-ENABLE INTERRUPTS
STA IER
JSR SCB2L ;SIGNAL TO PC THAT DATA HAS BEEN TAKEN
PLA
RTS
;
;SUBROUTINE TO SEND A BYTE TO THE PC
;
;WHEN THE PC WANTS A BYTE A STROBE IS ISSUED
;
PB PHA
LDA #$02
PB1 BIT IFR
BEQ PB1 ;READY FOR DATA?
PLA
STA IORA ;WRITING CLEARS THE INTERRUPT BIT IN IFR
LDA #$82 ;RE-ENABLE INTERRUPTS
STA IER
;SET CB2 LOW, MEANING "DATA NOW AVAILABLE".
JSR SCB2L
RTS
In this way one can co-exist with the CBM system!