I think one or two of us on that thread did try it.

The story of long reset causing damage is the kind of scary story, the kind of rare insider knowledge, which people like to hold onto and share. But that doesn't mean it's true! To me, without experimental confirmation, it seems like an urban legend, propagated in good faith.

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> I seem to remember...
Indeed! That's the sort of thing which helps legends to persist. I'd really appreciate a link to the post.

How long is "too long" on the reset line? I know for aftermarket reset switches on the C64, which simply ground /RESET, they might have been held down for seconds at a time in anger, which is eternity in CPU time, but not necessarily for heat propagation.

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_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

> Found it.
Thanks!

I see a few posts later ioncannon says:
> Have had it running for 10min now, CPU is really hot. How hot should they get normally?

So, for this design-in-progress, the chip gets hot during reset and gets hot when running. Might not be conclusive proof of a reset problem on the chip!

That does seem odd. Although the NMOS MPUs did run hotter than their CMOS counterparts, it wasn't as though one was cool to the touch and the other was causing first degree burns. I (again) vaguely recall the the NMOS part merely got warm during normal operation..

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Thank you for your answer! REST is connected to an output of an LS138. Long story short, the inputs of this LS138 depend on address pins of the 6502, except one active-low connected to R/W and the second active-low being an output of another LS138, itself also connected to address pins and Φ2 as an active-low.

Thus, if what I understand with my limited knowledge is correct, REST is always 1, except when the program writes to a particular address (what is written is unimportant as what matters in this case are the address pins activated - it is not a memory chip). If I am not mistaken, this address is $17E0.

Now the program calls this a few times, in particular... near the beginning Here are the first lines :

The beginning seems sensible for a start/reset, as memory is initialized with 00... But then STA $17E0 ? It does not make sense to me to activate the reset here. I have been banging my head on this wall for a while and can't figure out what is wrong.

It does sound somewhat like a watchdog, from Garth's description, so having the 6502's start-up code hit it to get another few tens of milliseconds of life sounds reasonable. The most important thing about this little circuit is not so much the logical function, as the time constants.

It is a reset circuit. One source of reset is the address
decoder. I'd expect a read or write to that address would
initiate the reset.
The is also a power up reset.
The capacitors are to delay the reset so that it holds
reset for enough clock cycles.
That is enough for the processor to clear things and also
enough time for the crystal amplitude to be high enough
to clock the processor.
Dwight

Actually looking at the circuit, it the part tied to the 138 is
a watch dog. If you don't kick the dog often enough it will reset
the processor.
Dwight

It is so simple it makes me feel dumb now! Learning something new everyday I'm sorry if my questions or remarks sound silly, but as I explained earlier I am no specialist, merely a science teacher with some academic knowledge of electronics, but no experience of complete systems.

So if I understand correctly (did my google about "watchdog" ), the call to $17E0 will actually prevent a reset, not initiate it, so that if for some reason the program hangs and doesn't call, the processor will reset? Meaning the program would have to call it at a frequency higher than the estimated 250Mhz, so that it has no time to trigger ? I see now why the time constants are so important here.

Side question, do you know of a software that could simulate such a circuit? I guess it would have to be some mixed digital/analog simulator?

Thank you all for your help!

Looks like ngspice now includes xspice, so that should work
http://ngspice.sourceforge.net/presentation.html

There's a good chance there are more user-friendly choices but I don't know what they are.
Maybe this: http://circuitlab.herokuapp.com/circuit/deccounter

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The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

A program called SPICE or HSPICE is often used to do
mixed digital and analog simulation.
Here is a written description.
When powered down diode 12 discharges capacitor 11.
NAND gates are any 0 on any input causes the output to be 1.
When first power up, capacitor 11 holds pin 1 of 4B low, causing
pin 3 to be a 1.
Regardless of the state of the watch dog, resistor 14 will bring
pin2 of 4B to a 1.
Resistor 10 will also bring pin1 of 4B to a 1. Both inputs will
now be a 1, causing the output pin 3 to be a 0. That is inverted
by 3B to let the processor run.
The processor executes code that pulls diode 19 down, discharging
capacitor 17.
pin6 of 4B is low so the output pin 4 is high.
A low to high coupled to pin 2 of 4B by capacitor 13 doesn't change
4B pin3 state.
Pin4 of 4B being high charges capacitor 11 through resistor 10.
Pin5 of 4B is now high. Inputs of pin6 is still low so pin4 is held high.
If the program does not access the address that pulls the doide 19
down, the pin6 or 4B will eventually go above the threshold and
will cause pin4 to make a 1 to 0 transition. This will couple through
capacitor 13, causing pin2 of 4B to go low, causing pin3 to go high,
causing pin2 of 3B to go low, resetting the processor.
Pin4 of 4B being low will discharge capacitor 15 through resistor 10.
When the pin5 of 4B is low enough, pin4 of 4B will return to high.
clearing the reset through pin2 of 4B.
If the program that is then started does not bring the diode 19 low,
pin4 of 4B will continue to toggle high and low by charging and discharging
capacitor 15. This will cause a stream of resets to the processor.
The 4093 has Schmitt inputs, meaning that the input have a moving
threshold, depending on the state of the output. If the output is high
the input will need to cross about 2/3 the power voltage to switch to the
output to 0. With the output at 0, the input will now need to go below
about 1/3 of the power voltage to cause the output to change to a 1.
This is called hysteresis. It helps to make the outputs of 4B crisp level
changes. A normal logic element would tend to go through an analog
amplification region as the capacitors charged. This slower action is
not desired for the circuit to work.
Dwight

Oops my mistake!
Thanks a lot! I think I understand that part now. And thanks also for the role of Schmitt-trigger inputs, you anticipated my question about them

Let me try to sum things up concerning timings with the program, to see if I understand correctly :

At power-up reset, capacitor (11) gets charged through resistor (10). This sets up a delay of about 70ms before RESET goes to "1" (allowing time to clear things up and for the clock cycle to be high enough).
During this time, if REST is left at "1", capacitor (17) gets charged through resistor (18). After a time of, say, 80ms, U4B oscillates, setting RESET to "0" for 2ms every 4ms.

So to run "normally", the program has to call $17E0 (meaning set REST to "0") before that time : when it does, diode (19) goes to ground for the time of the instruction (a few µs, I assume) and during this time capacitor (17) is discharged trough the diode (which means quickly, though not entirely). Thus, RESET remains at "1".

I wonder about the reason to make U4B oscillate. Wouldn't that be linked to the abovementioned problem of overheat if reset is held for too long? This way in case of prolonged failure reset would not be activated continuously but only 2ms every 4ms?