I haven't found any information on how to do this on this site, so I decided to do it myself.
http://kaput.homeunix.org/~thrashbarg/6502ss.jpg
This could easily be made into a small board and wired to the 6502 directly, as it only needs three pins, provided RDY is cut first (might be a bit tricky on a PCB).
Also, if you want to change the default state from whatever it is (stopped or running), disconnect the wire which goes between the 74LS00 B pin 4 to 74LS00 A pin 11 on the 74LS00 A side and attach it to 74LS00 A pin 8. Hope you understand that... The function of the RUN/STOP switch will be reversed too.
My web server's a tad dodgy (you can thank Bigpond for that) so it may not be available all the time.
Tell me what you think or if there are any problems!
Thrashbarg
Update: I've discovered a major bug with the design, it halts the 6502 AFTER the sync cycle, so you end up skipping an instruction on 1 byte commands or pointing to the first memory location on 2 or 3 byte commands. This is because SYNC goes high with phase-1 and there's a delay between the two on in the logic. I.e. The flip flop gets a clock cycle before the data is updated. I'll update the schematic if I find the solution.
Update: Got it working correctly now. I've updated the schematic. SYNC is run through the other half of the 74LS123 to give it a pulse, because it remians on during the halted period (I'm not using a MOS 6502, perhaps someone could test it on an original), and this causes the NAND flip flop to get confused. Also, rather than using another 74LS00 to debounce the RUN/STOP switch I attached it to the other half of the 74LS74, which brings the total chip count down to three. The RUN/STOP switch is synchronised with Phase-1 by the first half of the 74LS74, so there's no chance of RDY going low outside of the time specified by the datasheet.
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Check out my 8080 project:
http://kaput.homeunix.org