GaBuZoMeu wrote:
Using JVM with A having an odd contents could become a GTF (aka GoToForest). But JVM could do an implicit A and $FE to avoid this.
By combining Page*$100 + A and then shift this one bit left you still work with 8 bit quantities.
Well, I have an upgrade on the 65VM02 document (attached). The JVM is back to what I had previously, that allowed for a 256 element jump-table. I have various other instructions added to boost the speed. I upgraded FLDA and FSTA to access 16MB now, so we can store large files in far memory.
Here is a snippet of the document:
Code:
These are the new instructions (none affect the flags unless explicitly described as doing so):
JVM page jump through the pointer located at (page*$100 OR 2*A) --- the page value has to be even
OPA load A with (IP) in the first far-bank, then increment IP
OPY load Y with (IP) in the first far-bank, then increment IP
EXIP exchange IP with YA
YIP add the signed value in Y to IP
FLDA (direct),Y load A through a 3-byte pointer with a value in far-memory, setting the N Z flags
FSTA (direct),Y store A through a 3-byte pointer to far-memory
LLY load Y with the offset to the bottom value of the return-stack from the page boundary
AAS add A to S
EXAD exchange A and D
EXA (direct),Y exchange A with value at (direct),Y and set the N Z flags according to the new value in A
EXA direct,X exchange A with value at direct,X and set the N Z flags according to the new value in A
MUL multiply A by Y unsigned, leaving the product in YA
SGN sign-extend A into YA (set A to -1 or 0), setting the N and Z flags for the 16-bit result
TST test YA, setting the N and Z flags (appropriate for the whole 16-bit value)
ADY #value add the value to Y, setting the N Z V and C flags (in the same way as ADC does)
SBY #value subtract the value from Y, setting the N Z V and C flags (in the same way as SBC does)
CMPH direct,X like CMP, but uses the old C-flag (doesn't assume it is 1), and AND's the old Z-flag with the new Z-flag
BLT offset branch if less than branch if N <> V
BGE offset branch if greater than or equal branch if N = V
MRTI used to terminate MIRQ ISRs (similar to how RTI is used to terminate IRQ and NMI ISRs)
SEM sets the M-flag (this masks MIRQ interrupts, similar to SEI for IRQ)
CLM clears the M-flag (this allows MIRQ interrupts to occur, similar to CLI for IRQ)
ENTR push A X Y to the return-stack, then move D to X, then set A Y and D to zero
EXIT move X to D, then pull Y X A from the return-stack
Some of these instructions aren't strictly necessary. For example, OPY can be done with OPA TAY which is only slightly slower.
If chip resource usage is a problem, some of these instructions can be discarded and the code won't be much slower.
If chip resource usage is not a problem, some more instructions can be added (the INCH DECH LDYA STYA macros can be instructions).
It is possible to have two versions of the 65VM02. The big version is fully 65c02 compatible for legacy program support.
The small version would discard some of the crufty instructions in the 65c02 that are unneeded in Forth:
1.) The (direct,X) instructions can be discarded. It is unlikely that any legacy programs use this, so nobody will care.
2.) The JMP (address,X) instruction can be discarded. The JVM is more useful.
3.) The address,X instructions can be discarded (the direct,X is needed though).
The (direct,X) instructions were pretty useless --- nobody will care if (direct,X) is discarded.
The JMP (address,X) instruction was provided for byte-code VM systems, but these should be redesigned to use OPA and JVM instead.
Both of these addressing modes can be discarded without little or no pain.
The address,X instructions are pretty commonly used, so discarding them will break a lot of legacy programs.
Also, a C or Pascal compiler written for the 65VM02 may need them, so it is best to keep them even though Forth doesn't need them.
The "look and feel" of the 65c02 will be retained. There is no radical departure done, such as making the registers 16-bit.
It should be easy to port legacy 65c02 programs to the 65VM02 --- the 65c02 programmer should feel at home.