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PostPosted: Wed May 24, 2017 2:51 pm 
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So, here's a handwritten (illegibly scrawled, in my most legible hand) notion of how to approach the sensors.

For 6QTY sensors, and 6 QTY FIFOs, and 6 QTY FIFO-USB Bridges, I calculate the total amperage to be about 3 A. Seems like alot? But I am new, perhaps I made a mistake?

http://www.alcom.nl/binarydata.aspx?typ ... _AL460.pdf

http://www.ftdichip.com/Support/Documen ... asheet.pdf

Hey look at that! Whaddayaknow! FT602 !!!! Thats new (new-ish)?

http://www.ftdichip.com/Products/ICs/FT602.html (I'll have to think about that?)

KAC-9628 ( the image sensors I own) found here ; http://media.digikey.com/pdf/Data%20She ... 5B1%5D.pdf


So, if you want to do the math on these chips and let me know what the "current budget" is, I would appreciate it.

I will need at least two voltage levels; 3.3 V and 2.5 V. However, I think maybe, if going "linear voltage regulator" route, I might need 2 regulators at 3.3 V, and I might need 2 QTY regulators at 2.5 V (i.e. one each for the digital and analog supplies).

whoops... netbook doesn't like posting photos. These idiotic machines are soooooooo convenient, you can't do anything you want to do! I'll be right back with the image (somehow?)?


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PostPosted: Wed May 24, 2017 2:54 pm 
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[img]Internal%20storage/DCIM/Camera/IMG_20170524_092718.jpg[/img]


Baaahhh Humbug! Curse you, Net 3.0! I liked it better when the inter-web CONNECTED PEOPLE! (and thoughts and ideas, too!).


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PostPosted: Wed May 24, 2017 9:29 pm 
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The [img]...[/img] tags are for when you have the URL of an image that's available online. The forum software can't access your computer's onboard file system when someone requests a page for it to generate, which is why the image doesn't show up. You can attach it directly though. Click "Browse..." below the line where you see "Preview Submit Save draft Cancel" below where you write the post, find the right file in the pop-up browser, then you'll have to click "Add the file". Then, assuming you want to place it inline, put the cursor where you want the picture a click "Place inline" which is just below the writing area, above "Disable BBCode", "Disable smilies," etc..

Attachment:
Screenshot.gif
Screenshot.gif [ 40.61 KiB | Viewed 4306 times ]


Someone loaned me a netbook years ago, and as I remember, it worked like a normal laptop, just smaller. This was before the iPad and similar computers were out. Anyway, I'm sure you can attach your pictures this way.

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PostPosted: Mon Jun 05, 2017 7:28 pm 
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As I recall my frustration that day, the browse button wasnt working (for whatever reason). I have a GalileoPro, RCA (chinese/Asian manufacturer; RCA, David Sarnoff's "baby", was sold off back in the 80's I think (I was 0-10 years old, back then!); now it is just a name. Though a friend of mine just got an RCA microwave?).

I hate the darn thing. It doesn't let me name the file I am downloading, it doesn't always tell me when the download is in progress or when its finished, so I sometimes get truncated files because I multitask and go do something else, without the computer asking me if I want to let the file finish downloading.

It shoves all downloads into the download folder, and then between the two programs designed to move files, one will rename, delete and/or copy the file to a different folder (but not move or read the pdfs or video files). The other program will not rename, but will delete and/or read the file, but, again, won't move the file.

So , hassle above all hassles, I must scroll through one program to read and see what the file is (annoying if it is 4673967923.pdf?), then rename with the other program, then copy with the other program, then back to the other program to delet the original. HASSLE! Stupid OS! Android lollipop or marshmellow or something stupid like that.

I am cheap, and only use the free apps. Most of them stink and are only marginally useful. I found one or two good 6502 programs, though, and I wrote an asssembly program to help the local kids learn to prgram 6502 syntax. No takers so far, but I overstimate their abilities and proclivities sometimes. I need to find the precocious kids, I think?

So, one more try on this posting my photo, in a post below this post (i.e. this rant).


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PostPosted: Mon Jun 05, 2017 7:37 pm 
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randallmeyer2000 wrote:
I hate the darn thing. It doesn't let me name the file I am downloading, it doesn't always tell me when the download is in progress or when its finished, so I sometimes get truncated files because I multitask and go do something else, without the computer asking me if I want to let the file finish downloading.

That is likely due to an incomplete browser setup, not any particular fault with the machine or its operating system.

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PostPosted: Mon Jun 05, 2017 8:52 pm 
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OK, my backup plan didn't work either (I was going to post to facebook and then post link, as suggested (and tried), with IMG tags/brackets, in the above posts).

So scratch that. My direct question, in words, is this. I am trying to design a power supply for a ridiculous number of chips (complex chips; image sensors/microprocesor). (1) Does one use Kirchhoff's laws to make a parallel power supply circuit and (2) can one treat the dynamic behavior of a functioning IC as that of a variable resistor, i.e. variable load?

I am told image sensors are like little "light-processing-microprocessors". I think that is an accurate sort of statement. CMOS tech. Probably need a "GND-island" underneath them? Mine are VGA, old chips, low tech. They have analog and digital supplies, and GNDs to match (for decoupling purposes; separate analog and digital; but i have read that all GNDs should connect at one (narrow) point, even if they are spearate analog and digital).

The circuit I envision includes many FIFO chips and FIFO-USB bridge chips. Both these chips require their own XTAL, and so, with an array of (say, right eye only) 6 CMOS imagers, 6 FIFOs, and 6 FIFO-USB bridges, one clock circuit can run all 6 CMOS imagers (an XTAL, fed to a PLL and/or fanout buffer chip, to synchronize all image chips), and the imagers feed out a pixel clock with the valid data on the 12 bit bus.

The six FIFO chips will "catch" the data, according to the pixel clock and the 12 data lines from the microproc/image sensors. The XTAL for the FIFO will govern ITS OWN internal operations, and (probably?) won't interact with the image sensors, or the FIFO-USB bridge (?). The power supply for the FIFO chip is somewhat complex, too (see below).

Finally, as far as clock circuits are concerned, the FT600 (FTDI Inc.) chip wants its own XTAL too, and this will govern its own internal operations and not interfere with the other two chips. Also, the USB will "talk" to the USB devices and the USB-host, according to usual protocol. That is the beauty of USB; it is universal!

So, clocks "taken care of", here is the real question, about power supplies. I am assuming that Kirchhoff's Law are a paramount, here? I mean, If I use, say, the LT3080 (1A; 3.3V output; but also, perhaps, can be designed to put out the 2.5 V that the FIFOs need?), and use them in parallel with each other, I can get the 3A that I ?might? need (worst case amperage scenario?). Now, I can use "one trace", set to 3.3V, "capable of up to 3A", and split it into six (branched, like a tree), and then there are "six traces" , each "set to 3.3V, by the linear regulator", and each "capable of up to 0.5 A"? Right? I suppose, maybe I should study Thevenin again? I dunno?

Furthermore, my "notion" of how ICs work in a circuit, is as "active element", or really, as "aggregate active elements", since there are about a zillion transistors on it, each one potenitally functioning as an active element. (again I am a biologist, and inexpert at these things!). Put another way, I also view them as a variable load; because they are capable of drawing variable current, I assume they are capable of "showing" variable resistance to the rest of the circuit; and crucial to my question, showing variable resistance to the power supply? Is this correct?

So, with a well designed power supply, and each of the 18 ICs dynamically changing the load they present to the circuit (in this case, a "six branch" trace, according to kirchhoff's law, 3.3V, as set by me on the 3QTY LT3080s--in parallel for heat spreading and increased amperage output--each of the six traces capable of 0.5A). I forget the combined amperage i calculated for each of the six "camera head-boards", but one power supply board can probably supply all six camera-boards. Another option would be to power with the USB 5.0 V power supply; but that seemed more complicated to me. I am a beginner and need to do things in the standard fashion.

So, finally, if this ("six-branch") is adequate, conceptually, I just need a regular AC/DC transformer, full bridge rectifier circuit, with some smoothing capacitors (to feed the LT3080s circuit). Well, not exactly. I still will need a 2.5 V supply for the FIFO memory. (This whole question would have been much easier with diagrams. I need to fix my laptop; got a 2000-0142 HDD error message; Dell says no warranty, buy a new HDD. it works, but its slower than a booting commodore 64! But that is an entirely different complaint!)

So to recap, I just need to know, am I using cKirhhoff's laws appropriately? Dropping 500 mA across each camera-board, at 3.3V, indicates that the EACH camera board should show a minimum of 6.6 Ohms to the power supply. (these numbers aren't correct... I will try to post EXACT numbers from the spec sheets, below this post.). AT LEAST this much is true; IF ALL 6 camera-boards showed less than 6.6 Ohms, simultaneously, THEN, the power supply circuit would be drawing more than 3A and something would burn or break or stop functioning.

OK, below will be the relevant numbers from the spec sheets, but "I am new" and don't know if I have to include ALL of the "input/output pin amperages"


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PostPosted: Mon Jun 05, 2017 9:26 pm 
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Sorry if the following is a confusing mess, but I have run out of time for today; best to post, and sort out my thoughts tomorrow (or the next day, or next day, or next day...)



Summation of circuit requirements and spec sheets:

3QTY LT3080 output ; set to 3.3V, maximum of 3A (for 3 QTY)

6QTY KAC9628 Dual supply; analog and digital; 3.3 V ; VDDana = 35 mA ; VDDdigi = 16 mA ; (168 mW power consumption); input current at any pin +/- 25 mA; Package input current +/- 50 mA

6QTY AL460A Many Supplies; VCCpll = 2.5V (internally generated; ignore!) ; VD25m = 2.5 V; VD25 = 2.5 V; VD33= 3.3V ; IDD33 = 100 mA ; IDD25 = 185 mA; IDD25M = 78mA ;

6QTY FT600 Probably one supply voltage ?; VCCio= 3.3 V ; VCC= 3.3V; VDDana = 3.3V ; 70mA to 185mA, operating supply current for each FT600 FIFO-USB bridge ; input?/output? 9.5 mA (per pin?); in/ouput dirve strength 10 mA. VCCpll= 1.0 V (internally generated, ignore!)


KAC-9628 ; (Kodak/Nat.Semi?, CMOS VGA Image Sensor)

AL460A ; (Averlogic FIFO)

FT600 (FTDI, FIFO-USB bridge)

I will do additions and multiplications tomorrow? Mostly "Ohm's Law" stuff, I think?


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PostPosted: Mon Jun 05, 2017 11:47 pm 
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As an aside, if you just want to upload a photo, consider http://tinypic.com You don't need an account or anything, and it's not just small 64x64 avatars.

But anything that would reasonably be suitable for a forum post should work easily.


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PostPosted: Tue Jun 06, 2017 2:03 pm 
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thanks for the suggestions, but I have a stupid machine. EVERY "browse" button that leads to posting a picture on-line does not work. I get a dialogue box that asks "Do you want to allow firefox to record audio" and two options ; allow or deny.

I am fed up with android and netbooks and I just figure its another way to bilk the American consumer. Soooo convenient. Yeah, right. I hate to be cynical, but the "new things" are not necessarily better.

I have REAL thoughts to think; can't be bothered with glitchy, purposefully non-functional machines. I, for instance, often wonder what will happen in the next five years or so when the transistors get so small that they can't keep the electrons on either side of the silicon dioxide barriers? Does it matter? Do we need our computers to be any more miniaturized than they already are? I mean, that is why voice recognition tech took off; the buttons are too small on a smart watch. A screen smaller than a smartwatch screen would be useless. I live up here in the "BIG WORLD"; now, cramming added functionality and speed is always welcome, but I am skeptical about how much more room for "mass consumer products" there is in the market? The reason my netbook stinks, is because with no "upward, bigger and better" growth, the only thing left to do to gain market share is to fight for it; "format wars" and such. I thought the Apple and Microsoft thing was all over!

I dislike all of apple's comeback, (pods, pads, phones, etc.) the past fifteen years. I find their placement of my files in unreachable places, in strange formats, to be foolish and greedy.


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PostPosted: Fri Jun 30, 2017 7:08 pm 
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OK, sorry for cranky posts, but I really would like to update the project, as I have done some significant work on it recently.

I think I have sorted out the "Image-sensor-to-FIFO-to-Fifobridge" buses. I must tie up (or down?) some empty bus lines, as the image sensors I am using are kind of ancient (12 bits wide). Both the AL460/462 FIFO and the FT600X USB/FIFO bridge are 16 and/or 32 bits wide (selectable).

Since it is a "one-off" product--a scientific device--chip count is not horribly important. I could "wrap around" the extra bits, but such seems unecessary.

So, imager "PCLK" connects to FIFO "WCLK". The FIFO chip calls this a write cycle, and the bus is the DI (data input) bus (DI0-D11; with D12 through D15, tied?). PCLK should tell WCLK when valid dat is on the D0-D11 bus. Simple? I think?

The other important pins for a "Write Cycle" are, WE (input to AL460), and IE (input to AL460). I forget the image sensor "framing" signals, but I think VSYNC and HSYNC are pins used for these purposes. Since it is a dedicated write bus, concievably one or the other or both of WE and IE could be tied where they need to be, or "mostly tied" with some glue logic or even put a 6502 in there to handle resets and powerdowns and powerups, etc.? Not sure, here, yet.

THERE! One side completed! (If only power and GNDs were so simple! I'll manage).

Let's try the other side of the FIFO; the DO bus (Data output bus). DO0 through DO11 is the bus, with pins on BOTH the AL460 and the FT600 tied (up?/down?) (DO12 though DO15 [AL460/462] ; and D12 through D15 [FT600]). The AL460 calls this a "read cycle" but from the perspective of the FT600, it is a "write cycle" (I think this is correct? I will ignore the FT600's naming, and call it a "Read Cycle"; for simplicity). I think the TXE of the FT600 will pull the OE pin of the FIFO Low, active, and that signals the FIFO chip that the USB-bridge chip has room in its buffer. CLK from the FT600 is an output, and it feeds this to the RCLK (input) of the AL460-FIFO. Data output from the FIFO chip will synchronize to this clock, the CLK of the FT600, USB bridge chip. I think thats correct?

Then, I think, there are three (four?) more pins to worry about? Maybe needs some glue logic? Or maybe a 6502 to do the "conductor" and "orchestration"? I dunno yet? The FT600 has an OE input and a WR input. The AL460 has a REN output and an OE output. I think REN will connect to WR, and OE(FT600) will be tied high or low (or perhaps, "mostly-tied" with glue logic or a 6502 doing the "orchestration"?). And, as mentioned already the OE(AL460-pin) is already tied to the TXE, so no need to discuss it here.

Apparently, that's the easy part. I think i might go back to the power supply circuit and the XTALS!

Cheers! (will try to get to town and upload an image file, but rural poverty + netbook = killing me!)


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PostPosted: Wed Jul 05, 2017 8:59 pm 
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OK, spent 2nd, 3rd, and 4th of july, alone, on top of a mountain (about 2500 ft., but hey, I'm NE-USA, so its pretty high up!), livin-rough, and, you guessed it, working on electronics! I guess I do some of my best thinking when exercising and/or not distracted by "ADHD-America"!

So, Vsync, is just a "frame ender" alert signal. Since the FIFO can handle more than one frame (FIFO is 16 MB; one frame is 300k-pixels * 1.5 Bytes/pixel;mso 450KB/frame.), and I want 30 fps (maximum of my image sensor chip), vsync is not esactly correct for WE or IE of the AL460. Drats. Back to drawing board. Perhaps, a fast-response counter chip, to count to 30? But then again. why do I even need this? Maybe just ignore the vsync and hsync pulses?

Also, thought about the FT600, too. Maybe a problem here? I must read more documentation. Seems both the FT600 and the AL460 have inputs, and neither one is outputting much of use or interest? Someone must be master and someone, slave? Who is controlling this bus anyway? not to mix my politics, but I prefer the handshaking buses; all this master and slave talk gives me "the willies".


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PostPosted: Thu Jul 20, 2017 4:50 pm 
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Allright, googled "focal plane array" recently, and/or "curved image sensor" and found a hundred (hyperbole!? really, about 10 or 15) good articles (i.e. academic journals, peer-reviewed). Sheepishly, other people "have my good idea" too! DRATS! However, I was/am first (mostly; some guys have been trying curved imagers since the 1980's, but different methods, and usually as a consequence of astronomical imaging design. I guess "once bitten, twice shy"? The astronomers "missed the boat" on "film and photography" and had to "play catch up"! They assumed the eye was "the gold standard" for light sensitivity! Read Sean Johnston's "History of Light and Colour" for a description of the development of light as a science and engineering discipline.).

So, what to do if I am scoope about (a) FOIC fiber optic image coupler (hemispherical; see Arianpour et al. circa 2013), (b) foveated imagers (wodnicki et al, van der spiegel/sandini et. al, etc.), AND (c) rash of papers about curved imaging, beginning with Rogers et al. (circa 2008-2010; flexible imagers) and continuing with the commerical fetish for curved imagers (see iphone 8 and etc., in the patent literature) and further being pursued by groups at UCAL berkeley(it hink?) an MIT lincoln labs! WHEW, WHOAH! I am/was, "ahead of the curve"! Some big names and big money chasing.... well, what are we chasing? ( I know, I just want to know if YOU KNOW!).

So "focal surface array" will yeild many google hits and many academic journal searches will be returned. sci-hub.bz, if you are "unconnected" can "ahem"---"borrow"-- a copy, for you. Slightly unethical, perhaps, but who locked up the knowledge to shut out mavericks like me ( and us?)?

So, why am I doing this on the cheap? Alone? In a sea of organic farming shangri la's of the wild hills of VT? I dunno. I guess the farmers are more apt to discuss Wittgenstein with me, than the corporate, goeverment, or academic world (that last one is REALLY sad! Academicians who DONT WANT to discuss Wittgensttein! FOR SHAME!).

And why Wittgenstein? Where does knowledge come from? Is it all a language game? Is ther "nothing you can sing that can't be sung" like Lennon said, or is it that " Whereof one cannot speak, one must remain silent", as Wittgenstein might intimate?

And how about Chomsky? What is universal grammar? How does the poverty of stimulus argument indicate a "DNA of language"? What does Chomsky mean when he says "a child does not learn a grammar"? Perhaps a child obtains grammar, through the scant evidence provided bt arents and surroundings AND a cognitive substrate indicating a popensitiy towards Meyer's Law (my law; I discovered/invented it ; VN^2=S; also, associated laws of derivatives--rate of change--for acquisition of words, and exhibition of spoken and acted thoughts/sentences). Does the study of Linguistic Typology indicate something universal about the nature of lnguage, or is it merely the "habit" of "Western science" to impose its own vaues and categorizations upon a far more diverse and ineffable natural existence? Do natural languages (human languages) all have an SVO, VSO, SOV, SVO, OVS, or OVS structure?

And what has ANY of this to do with 6502? Well, its accesible (to my biologist brain), and cheap, and "open-source-ish".

(Note, I actually HAVE found a use for the 6502 in my "robot eye"; I need a "bus arbiter" and/or FIFO master bus controller" and 6502 can do this without a problem; polling and such; Especially, though, I need it for one pin on the FIFO (AL460/462) and one pin on the USB-FIFO bridgechip (FT600/601/602). BOTH these pins are an input, so each is expecting the other chip to say something. I think the 6502 must be the talker, in this instance!). I think it is the REN pin on the FIFO and the WR pin on the FT600.)

So, I ordered some LFQP-128 to PGA/jumperwire adapters. They were cheap, but I think I will want a BGA to PGA adapter, or maybe NONE AT ALL. Might have been a mistake. Don't know how I will solder all those wires correctly, and keep leads short and minimize interference? I don't know what I was thinking. O h well. At least they were cheap. I will try it out.

I am quickly moving towards the place where I can make this rototype on my own, ith available materials.

The final difficulty, after the electronic boards are put together, is making the lense to the "human eye specifications". I see very few articles discussing this possibility (Absolute crime! given the NEED of medical science and society, to understand the function of the human eye!). WHat else is not mentioned by the other studies? Osterberg's 1930s study estimating the number of photoreceptor cells in the human eye, Oyster's textbook discussion of "retinal sampling fields", circa 1999, and Curcio et al.'s revised estimate, circa 1990s, for photoreceptor density in the human retina. Crucial aspects of the design paradigm, moving forward! Also, why not a "mosaic", soccerball style, or otherwise (orange peel/slice style), of imagers, back-thinned, back illuminated, maybe even "curve-lapped, to fit the size and shape of an average retina? WHERE ARE THESE NOTIONS! Only HERE! Aren't you glad you read it HERE FIRST!).

OK, maybe I am manic. Maybe I am crazy. But I tell you this sincerely. I hope, after reading this, you are a bit crazy too, cuz only crazy seems to make sense these days!


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PostPosted: Fri Aug 25, 2017 12:27 am 
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Just a few odds-and-ends questions about SMD.

(1) Does size of a SMD capacitor matter? As long as the rating is good, everything is OK, right? Most of the SMD capcitors I have say something like 25V or 50V , which seems like a ton of voltage for such little things. Breakdown voltage I think? So they seem OK on that score? So I guess the only probelme there is how small I want to work (don't sneeze!). I think I did something stupid and bought a bunch of 0402-metric, which is ridiculously small for anyone but a Lilliputian! I might bite the bullet and just use them.

(2) SMD resistors are trickier, right? Gotta watch the wattage. The 0402-metric ones have like 0.062, or 0.05 W or something like that? I am not sure my IC spec-sheets (image sensor, FIFO, and USFIFO-bridge) tell me how much amperage or voltage will travel on each line/trace? The internet seemed to think that 0402-imperial or 0603 or 0805-imperial were more suited to general use, with wattages of 0.1 or 0.125 W? Can I just "listen to the internet" and "fudge it"? Must I scour the datasheets, again, for every hint of usable data, and go through EVERY worst case scenario for voltages and amperages, and design with the worst case in mind?

(I know what you folks will say here: "just use common sense". But "electrical engineering common sense" and "biologist common sense" are not the same thing... so telling me to "trust what my instincts tell me about the circuit, is a bit like telling me to "go ahead and wing it".)

OK, one or two more items for today, but I will post below, as they are not so much "problems"--needing attention--but, "developments". Thanks a ton (for answers/advice), in advance!


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PostPosted: Fri Aug 25, 2017 11:14 am 
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SMD-capacitors key ratings are size (F), working voltage (V), and ceramic material. The latter should be X7R or X5R for larger caps (1nF and more) or NP0 (or C0G) for 1nF and less. All other ceramic materials suffer from more or less high capacitance deviations by temperature and applied voltage (!). On the other hand - other material (like Y5V) are cheaper and you may get more capacitance in the same size.

For resistors a safe way to estimate worst case power rating is calculating U²/R where U is the voltage applied to the resistor and R is the resistance of that resistor. The assumption here is a short circuit to ground or supply. (Under rare situations in digital logic, there might be higher voltages, e.g. interface circuitry). As your circuit probably will use either 5V or 3.3V or less, you can see that 0603 (0.1W) is bullproof for resistances above 250 ohms in 5V circuitry and roughly 100 ohms when 3.3V is around.

Of course the appropriate value of a resistor depends on its usage. E.g. a "pull up" resistor for the nIRQ input of a 6502 has usually 3K3 ohms. This is 1 mA into ground if "pulled" down by something. 1mA is a small load for most electronics on one hand and pretty much for spurious signals which may interfere. But if you would have an application where you need to save every µA if possible, you would choose say 100K instead of 3K3 as 100K still does the job.


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PostPosted: Fri Aug 25, 2017 6:27 pm 
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Hey Thanks, GaBuzoMeu,

Your answer is the perfect amount of common sense and experience that I needed.

Now if I could commit it to memory, I might actually finish my project someday. Cheers and Happy Friday to you!


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