cbmeeks wrote:
I think that was it. The frequency generator had 5V P2P. However, my scope was showing a low of 1.xV and a high of 6V or so. Not sure why that was happening.
So I put in a plain-jane 1MHz canned oscillator and discovered that A0 was running an average of 250 KHz. Which is what I expected! But I'm a little stumped. I've used my frequency generator to drive other chips. Including AY-3-8910's before with 0 issues. I guess it just isn't putting out enough current that the 'C02 needs?
As Garth noted, the CMOS inputs of the 65C02 represent negligible loading, other than the capacitance. Your signal generator probably was not meeting the rise and fall times required by the 'C02.
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BigDumbDinosaur wrote:
While looking at the Ø1 and Ø2 outputs is useful to see if the MPU's clock circuitry is alive, you should keep in mind that the timing relationships between the Ø2 input and the Ø1 and Ø2 outputs of the 65C02 are not specified by WDC, and are not tested during production.
Right. I wouldn't use them in a modern design. I was just hoping they would tell me if the 'C02 was clocking or not. I would imagine (maybe incorrectly) that in a proper circuit, they should be doing SOMETHING other than flat-lining.
You should be able to see output on those pins, so they are usable as diagnostic points.
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So, I originally had the 74AC00 in the circuit but I noticed the "GND reference" signal of the square wave had TONS of bounce...for a lack of better terms. The peak frequency looked OK but the low signal looked like a sawtooth wave. When I swapped it out for the 74LS00, the entire wave (up to 1MHz) looked almost perfect.
Now, granted, that was when I was using the frequency generator. But what I'm puzzled about is why the AC version made the wave so much "dirtier" than the LS version?
As Garth pointed out, you are seeing the effects of rapid output transition. In some cases, 74AC logic can approach sub-nanosecond output transition rates, as well as produce strong output drive (usually sourcing and sinking 24mA in a 5 volt system). These characteristics, as well as very short propagation time, make 74AC logic perform well in fast systems. My POC V1.1, for example, using all 74AC logic, will boot at 15 MHz on a 45ns ROM, and I'm sure, would operate at 20 MHz if I had wait-state hardware.
However, the extremely rapid output state transition characteristic of 74AC devices generates a huge amount of high order harmonic content, causing momentary but very intense transients at the Vcc and ground connections of the device. You counteract the effects of those transients with a suitable decoupling capacitor (a 0.1µF X7R MLCC, with a 50 volt rating is a good choice) and a robust ground connection.
The capacitor must be as physically close to the device as possible, with the Vcc connection as physically short as possible. I design my PCB layouts so the path from the Vcc inner layer to the device proper is through the capacitor's pad so the capacitor is electrically "in between" the device and the Vcc rail (a design feature I saw years ago in an MC68000 minicomputer). That gives the capacitor every possibility to capture and dissipate any switching transients before they get onto the Vcc inner layer. You can do something similar on a hand-wired unit if you are careful.
On the ground side, you need to keep inductance out of the picture as much as possible with short and direct connections. The ideal way to achieve this on a PCB is with an inner ground plane, which is what I use in my POC designs. That isn't possible with proto-board, so you need to plan carefully.
Wire size doesn't have much to do with it. It's mostly length between the power source and the power consumer that matters. Much more than few inches and you are likely to get into induced ground bounce, in which the ground connection at the device is momentarily above ground potential as the device's output state changes. If the effective difference between the ground pin and an input pin changes enough due to ground bounce, the device will become confused by what it is seeing at the input and in some cases may go into oscillation. Needless to say, that would be bad, very bad.
There's quite a bit of discussion around here about construction techniques with high speed logic. Garth also goes into it on his website. Succinctly stated, Vcc and ground connections need to be as short and direct as possible and well bypassed, with an MLCC at each device and low-ESR electrolytics in strategic locations to help stabilize Vcc.
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I may swap it out again and see if the canned oscillator does the same thing.
You may see an improvement. Let us know...