I am a newbie that is trying to build a 6502 sbc based on information from Grant Searle's website: http://home.micros.users.btopenworld.co ... tml#Wiring

(Please excuse some of my questions as this is a first time for me. I have no electronic experience but found link and thought I would give it a shot.)

I purchased most of the parts except, reset button, connectors for power and serial i/o. I wired the address and data bus according to instructions on his site but when I came to do the wiring for the decoding, clock and serial interface I ran into some problems.

1. Finding parts for the reset button, power and serial i/o.
if you look at the image his has listed:
http://home.micros.users.btopenworld.co ... /front.jpg

a. where could I find similar parts or alternative parts that I could use?
If possible could a company name and part number be provided for power and serial connectors, reset button?

2. In the Wiring of the decoding, clock and serial interface (http://home.micros.users.btopenworld.co ... tml#Wiring)
I can't seem to find where he connects/wires the power supply.


Thanks for any help,
cu44

Any pushbutton will do. The one he has there is a 6mm tactile keyswitch which is made my lots of switch companies. Jameco's part number 149948 (Jameco, a distributor at http://www.jameco.com ) is one such switch. For the serial connector, you'll usually want a DB-9 or DB-25. These are also made by lots of different companies. One example part is Jameco's p/n 223010. You can see their related connectors at http://www.jameco.com/Jameco/catalogs/c262/P118.pdf . For power, use whatever is convenient for your power supply. If you just use a wall-wart power supply, you'll probably want a DC-10 jack like Jameco's 297570CK or 281851CK. Make sure you get the right size pin for the wall-wart to plug into. The outside is most commonly 5.5mm, but the pin is often 2 or 2.5mm. The sockets shown in your picture appear to be like Jameco's p/n 104053CK, but I don't think they're as practical for this application.


Very basically, all the IC pins marked Gnd or Vss go to ground, and all the ones marked Vdd or Vcc go to +5V.

I hate to disappoint you, but this is a very poor design. If it worked at all for the person who posted it, I suppose there's a good chance it will work for you too, but it uses an awful lot of parts to do very little, and do it unreliably and using a ton of power. Plenty of the designs on this website will be better.

Edit, 9/18/2014: I have a 6502 primer on my website at http://wilsonminesco.com/6502primer/index.html . It's actually a set of 22 articles covering many aspects of 6502 computer construction, some relating equally well to other computers too. The http://home.micros.users.btopenworld.com/ website you linked to is no longer there.

Sadly, Lee who also posted in this topic died on Sep 27, 2013, at the age of only 49, apparently of MS. He was a transmitter engineer who worked at Woofferton (apparently in North Wales). Dave Porter there noted that "If we ever needed a digital/logic circuit he was the font of all such knowledge".

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

GARTHWILSON,

Thanks for the help. I chose this project basically because it was one of the first ones that I found that looked around my skill level. I didn't discover this website until being directed to it from Vince (brielcomputers.com)

Thanks again,
cu44

I had a little trepidation when I looked at that design as well.. the first thing that struck me was that in the schematic RDY, /IRQ and /NMI are all tied directly to Vcc instead of going through pullup resistors as in pretty much every other design I've ever seen. What would the implications of that be?

This is completely harmless. It prevents future expansion, that's all.

The 6850's E input not being actively used is more questionable. One might get away with it, but proper operation can't be guaranteed.
The address decoder is unnecessarily complex and leaves large parts of EPROM inaccessible.

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I trust my somewhat flawed English is comprehensible to all.

E on the 6850 is only used to quallify the chip select signals. As CS0 already has phase 2 as a component tying E to Vcc makes no odds.


There is method in the madness. The memory map is so arranged to be able to run the Compukit firmware with minimal changes, relocating the BASIC interpreter without the source is a near impossible task.

Grant's design was one of the sites that inspired me to do things 6502 again and was one of a very few 6502 designs available at the time. I built a very similar SBC that replaced most of the glue logic with one GAL and had another 32K RAM to give RAM up to $A000

Lee.

My biggest complaints about the design have been cleared up now that I see that there were a couple of lines missing either in the drawing or in the way it shows up on my monitor. One of those missing lines apparently goes from A15\ to one input to the NAND gate that feeds the RAM's CS\.

Still, there's no debouncing or timing for the RST input. Holding RST low for more than 100ms on the NMOS 6502 caused heating problems that would make it misbehave. OTOH, the CMOS 6502 doesn't care if RST is held low for a long time, and it has a Schmitt-trigger input so the RST edge is internally clean. But there should be at least a small capacitor following the RST button for debouncing, and the capacitor should be as close to the ground and RST pins as possible, with minimum lead length, to avoid picking up switching noise that can make the RST toggle faster than the two full clocks' minimum low time required to make it work right. I've been bit by this one before; and even with a 6-layer board with power and ground planes already made, I had to put a small capacitor from pin 1 to ground with leads as short as possible, since I was not using an external RST timer, just the voltage ramp-up from the RC. This paralleled another capacitor on the board, but the other one was a couple of inches away, and there were problems.

The 6850 does not have its own internal baud-rate generator like the 6551 does, and the baud rate cannot be changed directly with software.

I would have done it with four less ICs, gotten the maximum address-decoding propagation delay down to about a quarter as much, reduced the power supply current by 80%, debounced the RST, and used the IRQ so the software doesn't have to babysit the UART so much.

While it doesn't have a baud rate generator the 6850 does have clock prescalers and select logic so you could do say 2400, 9600 and 38400 baud under software control.

There was a mod for the Compukit to use this feature to give software selectable 110 (really 125), 600 and 2400 baud on the cassette port.

Lee.