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PostPosted: Thu Feb 09, 2017 11:56 pm 
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Interesting post. As someone stated there are as many possibilities here as there are members!!!!

In my case I was looking at 6502 as an alternative to some of the embedded processors solutions out there. In this case the ATmel and ARM M3 & M4 derived chips. That is chips designed for embedded uses with plenty of I/O hardware built in. Sadly it seems like there is nothing like this in the 6502 world. At least not chips that are easy to obtain. I actually signed up here to be proven wrong.

In any event my ideal chip would be highly integrated and 8 or 16 bits. 8 bits is doable if the performance is there, this is another issue with the 6502. This chip would come with built in serial ports (RS232) for interfacing, possibly a native USB port, SPI or other serial interfacing ports, timers, quadrature interfaces (encoder) & etc. Basically the hardware we need to control the physical world. The really needs to be in a single package as these days there is no reason not too. We should be able to easily pack in a whole bunch of RAM, and enough Flash programmable ROM to support a wide variety of uses.

In short what I'm desiring is integration and high performance. Frankly the integration of even the newer 6502 chips doesn't seem to match what one can get form the likes of Microchip and Atmel, then you have to consider the ARM based solutions.


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PostPosted: Fri Feb 10, 2017 6:39 am 
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It would be nice to have something of the kind. WDC makes 65-series microcontrollers, but they are mask-programmed, for some reason(I suspect that they think they'll make more money that way). To my knowledge, they haven't shown any interest in making user-programmable versions. They have shown a similar attitude towards fixing the 6551 ACIA's Tx IRQ bug.

I suspect that it might be possible for someone to make one in an HDL and get it made by an ASIC fabricator(VLSI is the only one I know of).
Daryl Rictor (8BIT) has made an SPI master that goes on a CPLD, and I know that WDC has the 65C02 and 65816 available in an HDL(I'm not sure which one). The 6551 ACIA and 6522 VIA might be there as well, but you'd probably want a newer RS-232 device than the ACIA, because that implements full RS-232, and the hardware handshaking cannot be turned off. The VIA could possibly be improved upon as well, especially as it does not offer pin change IRQs(as far as I know). I don't imagine that WDC would object, as they make most of their money from licensing soft cores.

It is rather annoying, and probably a bit of an obstacle to people using the 65-series devices. It's a bit of a pity, really. The potential applications are nearly endless.


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PostPosted: Fri Feb 10, 2017 6:56 am 
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DerTrueForce wrote:
The VIA could possibly be improved upon as well, especially as it does not offer pin change IRQs(as far as I know).

CA1, CA2, CB1, and CB2 can generate interrupt on change. You control them in the Peripheral Control Register (PCR) and Interrupt-Enable Register (IER).

The "Circuit potpourri" page of the 6502 Primer shows a long (but not complete) list of things you can do with the VIA.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?


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PostPosted: Fri Feb 10, 2017 9:39 am 
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I muss confess that I still don't understand why WDC doesn't offer a "pure" 16-bit processor, basically a stripped-down 65816 without emulation etc.


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PostPosted: Fri Feb 10, 2017 9:49 am 
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scotws wrote:
I muss confess that I still don't understand why WDC doesn't offer a "pure" 16-bit processor, basically a stripped-down 65816 without emulation etc.

Any change they make to the design would cost them hundreds of thousands of dollars. They'll never get that money back, with already so many better CPU designs on the market.


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PostPosted: Fri Feb 10, 2017 10:49 am 
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DerTrueForce wrote:
WDC makes 65-series microcontrollers, but they are mask-programmed, for some reason.

Mask ROM is just an ordinary chip process. To make programmable memory, or erasable programmable memory, is a different and more expensive process (and would of course need a new design.)

As with the ACIA issue, and as Arlet says, chip design is expensive, while chip fabrication is cheap. It makes sense to stretch out production into significant volume, to make the numbers add up. (That said, the ACIA issue feels to me like a big embarrassment.)


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