Ok, on my project I'm working on I need to be able to break up memory into different blocks following a C64 like memory map scheme. Keep in mind that in all probability my final build will likely use a CPLD or FPGA, but for now I'm showing ICs to do the tasks. Test builds will likely use IC chips instead of programable logic. So these initial designs are proof of concept. Here is my address identity layout so far.
I realize I will likely need pullup resistors on a bunch on lines, I haven't shown them party for clarity, and partly because I don't know what values yet.

The master thread is located at:
http://forum.6502.org/viewtopic.php?f=4&t=4356

_________________
I am working on building a 65816 based computer (for personal use)

Eventual goals include:
65816 CPU up to 14-16 MHz (In Turbo Mode)
up to 16MB RAM (512K on the main board)
Dual YM3438 audio
IEC serial device support

It doesn't look right how on each of the HCT85's you've got two outputs tied together. When they try to assume different states there'll be excessive current flow. And does the Truth Table suggest you'll get useful output when all the cascade inputs go high simultaneously? I haven't checked. But tying those guys together looks odd, too.

PS- you've started a new thread and mentioned "my project I'm working on." Maybe it'd be helpful for those reading in future if you were to link to the other threads involving the same project.

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

I supposed on those outputs I should throw some OR gates on there to address the first problem.

I couldn't see a problem with all the inputs going high simultaneously. The idea is that it disables the output. On my project I intend to have more than 64K of RAM, so the first 521 qualifies that. If I am accessing a RAM location beyond that first 64K, then all other comparison conditions are disqualified. When any address in the A16-A23 is activated, then the first 521 is false which makes its output high, which is routed to the 85's inputs. Each one that is driven high has its corresponding output put into a low state. I do not see a problem with them all being driven high or low at the same time. If it will put to much strain on the output of the 521, I could probably use something to take the load, like a driver or something. I just can't think of any reason why I would ever want to disable any of those chips or inputs individually.

I will add the OR gates because I do think they are needed. Makes the schematic a little crowded.

Again, I found your suggestions helpful.

I am working on other parts of the schematic, I will post them as they are completed.

_________________
I am working on building a 65816 based computer (for personal use)

Eventual goals include:
65816 CPU up to 14-16 MHz (In Turbo Mode)
up to 16MB RAM (512K on the main board)
Dual YM3438 audio
IEC serial device support

Ok, here are some revisions. I'm not sure what to do with the first 521's output to keep from drawing too much current through it yet. I'll figure something out. I was thinking in terms of a driver of some sort, or a switch or something.

_________________
I am working on building a 65816 based computer (for personal use)

Eventual goals include:
65816 CPU up to 14-16 MHz (In Turbo Mode)
up to 16MB RAM (512K on the main board)
Dual YM3438 audio
IEC serial device support

Sorry to be blunt, but the top part of the schematic with the three 74FCT251's can probably be replaced by a few multi-input OR ports (or a simple diode-logic circuit), and the bottom part with the five 74HCT85's can probably be replaced by a single 74*138 and a little bit of glue logic to tap into one or two NOR ports on A16-A23.

The propagation delay of those cascaded magnitude comparators is also going to be much longer than the delay of a '138 plus whatever glue logic you need.

Obviously once you're in an FPGA, those comparators will all get optimized away but while you're working with real chips, the propagation delay could turn into a real problem.

===Jac

Ok, I'll look at that. I'm certainly no expert at this kind of stuff. But anything that uses fewer or cheaper chips or that has less delay is great. Switching speed is important, especially if I want to hit my full speed target.

The FCT521 was choosen because it takes a maximum of 4.5 ns to switch and could be as little as 1.5 ns. The HCT85s look like they might be a bit slow. I'll need a faster solution to replace them for sure. They are almost fast enough. As far as cascading, they are all in parallel with each other, they don't require input from each other to function. They only require the input from the 521.

I looked at those 74XX138 chips. The fastest ones I can find are way too slow. Most took several hundred ns to produce an output. So it might let me use fewer chips, but if it takes that long to produce a result its not going to work.

In all probability my OR gates and the AND gates shown are too slow as well. I will need to find faster ones.

_________________
I am working on building a 65816 based computer (for personal use)

Eventual goals include:
65816 CPU up to 14-16 MHz (In Turbo Mode)
up to 16MB RAM (512K on the main board)
Dual YM3438 audio
IEC serial device support

Jac is right: those comparators are going to be a real drag on system performance. Perhaps you should study the various logic families in more depth before selecting a particular device for a particular role.

Speaking of logic families and as a somewhat general rule, 74LS should not be used in new designs. With 74LS, you are dealing with weak fanout and so-so switching speeds. 74F, while faster than 74LS and with stronger fanout, is power hungry and has noise immunity issues. Both 74LS and 74F should be considered obsolete.

74HC logic, although possessing better fanout than 74LS, as well as much better noise immunity, is usually no faster than 74LS equivalents. 74HCT is slower than 74HC. 74xCT logic is intended for interfacing to the outputs of TTL-compatible devices. Unless you are using such devices, do not use 74xCT logic, as you will be paying a penalty in propagation delay.

My POC V1 units were built with 74AC logic. POC V1.1 will boot at 15 MHz, minus the SCSI host adapter (there is no wait-stating in the design). Typical 74AC gates running on five volts exhibit prop times in the single nanosecond range. The 74AC138, which I used for generating I/O device chip selects, is available in DIP or SMT form and has a worst-case prop time of 10ns over the commercial temperature range. I don't know which 74xx138s you looked at, but evidently the 74AC138 wasn't one of them.

The fastest discrete logic currently available in five volts is 74ABT. However, 74ABT has a bi-polar output, which does not swing from rail to rail like 74AC. Use with caution in CMOS systems.

I will say one last thing. Around here, we do our best to encourage first-time builders to keep it simple so as to ensure a successful design. We like to read about new devices that power up and function on the first try. I kept it reasonably simple with my POC V1 unit, even though my digital electronics experience goes all the way back to the latter 1960s. My POC V2 unit is a more ambitious project, but not so complex that I couldn't troubleshoot it if it failed to operate. POC V3 will be more complex than V2, and so forth. I am going in stages so I don't overwhelm my ability to solve problems if something fails to work.

Succinctly stated, the greater the complexity of your design the greater the likelihood of it being DOA when powered. Your project, while very interesting, is, in my humble opinion, too complicated for a first-time build.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

Fair enough, I'm going to find an alternative to the comparators. The 521s aren't bad, but the 85's are not nearly quick enough. It seems magnitude comparators are usually much slower. I'll look at ditching them entirely.

In regards to the LS, that was a mistake. My schematic program has templates, but I usually have to manually change the numbers because it defaults to the LS series, which I neglected to do. The AC series is what I'm mostly using. If there is a better series, I am open to such suggestions. I am learning and trying to figure out what is what. My selection in using the 521 was based on someone else's schematic, but their speed requirements were not as strict. When running at only a couple MHz delays aren't as critical.

In regards to the complexity, if I wanted a simple 6502 build, I'd just build one. Not that I'm trying to do things the hardest way possible, but I'm not interested in picking an easy project either. My goal is to try to build a C64 compatible, using real hardware, that where possible overcomes the speed and performance problems that handicapped the original machine.

Figuring out the address latching and logic is the most complex part. Again the final implementation will be done with programmable logic.

So on that decoder, lets tackle the lower portion of the schematic which only looks at the upper 4 bits of the A8-A15 range. I will rework for the decoder

Also in regards to the 74AC138, it wasn't what I looked at. Or rather I initially looked at the wrong timing table. That does look fast enough. And it dramatically reduces the number of components.

_________________
I am working on building a 65816 based computer (for personal use)

Eventual goals include:
65816 CPU up to 14-16 MHz (In Turbo Mode)
up to 16MB RAM (512K on the main board)
Dual YM3438 audio
IEC serial device support

In something I've been working on, I've run into a lot of disappointments regarding availability of suitable logic gates that are not run of the mill. I'd find one that's fast enough and pulls up to CMOS levels, and find no one carries it; or I'd find one that's fast and available, then find it doesn't pull up high enough; and so on. If you don't have an aversion to surface-mount, the 74LVC family is pretty attractive, and the one-gate variety (74LVC1G__) may even make PCB routing easier, since you can put the individual gate where you need it instead of having to run traces over to a dual, triple, quad, or hex. However, be aware that although many (most?) of the 74LVC's can work at 5V, not all can. In any case, you'll want to check details before settling on a design.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

I can do surface mount in the final build. But in testing and development, the ability to use DIP packages is very attractive. In surface mount parts I have to build adapter boards first.

Also keeping many parts socketed allows parts to be replaced. But if I do it right, most should never fail.

_________________
I am working on building a 65816 based computer (for personal use)

Eventual goals include:
65816 CPU up to 14-16 MHz (In Turbo Mode)
up to 16MB RAM (512K on the main board)
Dual YM3438 audio
IEC serial device support

Here's a sampling of what's available in 74LVC1G__ : http://anycpu.org/forum/download/file.php?id=173 Note that there are combinations that are often needed which have only a single gate's delay for the pair, like 3ns for two gates cascaded.

There's a more complete parametric listing at http://www.ti.com/paramsearch/docs/para ... 8nom=0.8;5

I got both of these links from Jeff Laughton (Dr Jefyll on the forum).

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

That first link isn't working for me right now, Garth. But I suspect it's this you're referring to.

I've learned more since posting that, mostly by reading the pdf that's attached, How to Select Little Logic scya049a.pdf. For example, the 1G (ie, one gate) chips are only part of the "Little Logic" family.

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

I'll have to look at those little logic chips.

Btw, I got the lower part of my schematic redone using the 74ac138. Definitely uses a lot fewer components. I'll be able to fit more of the logic schematic on one page. And yes it's much faster. I'm trying to figure out how to get rid of the FCT521s. What multi-input OR gates do you recommend? Or is it just as fast to just use regular or gates in a cascade?

_________________
I am working on building a 65816 based computer (for personal use)

Eventual goals include:
65816 CPU up to 14-16 MHz (In Turbo Mode)
up to 16MB RAM (512K on the main board)
Dual YM3438 audio
IEC serial device support

I don't want you to take this wrong, but there's an old adage about the Lord helping those who help themselves.

Part of the task of designing a circuit is doing the necessary research to determine how available technology can best fit your needs. Questions such as the above suggest to me you have not done that or have performed only a cursory search. If you had you'd know what is available in multi-input gates, OR or otherwise, and would also have an idea as to how to shape your circuit.

One of the more useful tools for finding the logic you need is the parts search engine at the Digi-Key website. I recommend that you become familiar with its workings.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

It's too bad nobody publishes a giant data book like TI did, anymore.