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 Post subject: Re: Speed & EEPROMs
PostPosted: Wed Dec 07, 2016 8:58 pm 
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Joined: Thu Dec 11, 2008 1:28 pm
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Location: England
That's OK - once or twice I've responded and then noticed I'm not on the final page.


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 Post subject: Re: Speed & EEPROMs
PostPosted: Wed Dec 07, 2016 9:28 pm 
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Joined: Fri Aug 30, 2002 1:09 am
Posts: 8543
Location: Southern California
Quote:
I just stumbled on this thread. I'm not sure you fully understand the
concept of a starred ground.
It will not speed things up. It is intended to isolate ground currents.
In digital, you need to keep grounds clumped together, not isolate
them.
Dwight

The star is part of what I advocate for wire-wrapping (or any board lacking a true ground plane), for the power and ground connections, with the power source and largest capacitors in the center. It's really more like a spider web
Attachment:
spiderweb.jpg
spiderweb.jpg [ 43.58 KiB | Viewed 1025 times ]

with power and ground connections going around the center as well, from one IC to the next. I still advocate the bypassing as each IC as well unless you have both a ground plane and a power plane.

As Dwight says, there are still places like A/D converters which may need their own isolated power and ground region to keep digital or SMPS (switch-mode power supply) noise out of them, and I also give SMPSs their own plane area to keep the switching noise out of analog circuits. The plane sections are joined only at one place, with bypassing there, and the signal traces are brought through as close as possible to that point, not crossing the chainsaw line at just any ol' place. Putting a trace across a cut in a ground plane is a good way to get an antenna, and is in fact one way antennas are done in hand-held wireless devices. This is why ground pours do not qualify as a true ground plane.

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 Post subject: Re: Speed & EEPROMs
PostPosted: Wed Dec 07, 2016 10:33 pm 
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Joined: Tue Jun 08, 2004 11:51 pm
Posts: 213
The web it more like a grid.
The main supply capacitors should be isolated like a star
so that the AC surge path is on one side and the loads
on the other. They even make 4 lead capacitors for just such
use.
I've always believed the larger board capacitor should be
near the same edge as the rest of the I/O.
More like 1/2 a spider web.
It is tough on the far corners but more correct for signals
going to and leaving the board.
Local bypass is always a good idea but on single level
signals like TTL it has limited ability to squish noise. At best
it drops it by 1/2.
Long runs of high speed signals should always be differential.
This is true, even if one doesn't use but one signal at the end.
Termination is always difficult on a multi-drop signal line.
Dwight


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