Hi all,

I've been shopping for a UART for my 6502 SBC and want to use a MAX3100 - they're cheap, easy to get hold of and have a small pin count. The chip has a SPI/Microwire interface, which I wasn't aware of until now, so I've been doing some reading about it.

A few people have mentioned on this forum that its possible to implement SPI using the 6522 shift register. I haven't used the shift register before, so I spent some time today looking over the datasheets and figuring out how it works.

I'm stumped. I can't see how to implement SPI using a single 6522. SPI is full-duplex, so I need two shift registers to be able to receive and send at the same time. However, there's only one clock source. So it seems I'm stuck with either bit-banging, or using a second 6522. In the latter case, I have to synchronise the clocks between the two. I could do that by having the first 6522 generate the clock and using the external clock shift mode on the second 6522. Except that its buggy and doesn't really work, right? So the only synchronised clock source left is phi2, which would work, but by this point things are starting to get rather complex and I have more questions than answers, which I don't like.

So, I put the question to those who have implemented SPI: how did you do it? Does it take two 6522s to do the job? Can it be done in one? Or perhaps a single 6522 with some help (eg an extra shift register (74595)) is better?

Thanks,
Rob.

I don't recall ever seeing a post saying that it definitively is possible to implement SPI using the 6522's serial port. I do know that there have been a number of posts saying that the 6522's serial port is almost capable of providing the functionality, however.

The reality is, you cannot use the 6522's serial port to implement SPI in hardware -- you have to bit-bang the interface via one of its parallel ports.

The 6522 came before SPI was devised. It's close to being compatible with SPI modes 0 and 3, but alas, no cigar. The VIA's SR is very useful with logic like the 74HC595, '165, 4094, 4021, and some LCDs and other things that use serial I/O without the intelligent protocols. This allows you to get literally hundreds of bits of I/O throught just 3 pins of the VIA.

SPI is easy to bit-bang though. It's most efficient if you put the clock line on a bit 0 of a VIA port so you can move it up or down with the single instruction INC or DEC, and put the data-in line on a bit 6 or 7 so using the BIT instruction to test it (regardless of accumulator contents, and without affecting the accumulator) puts the bit into the N or V flag for branching as you build the byte you're shifting in.

There's more about it at http://www.6502.org/forum/viewtopic.php?p=4136#4136

Thanks for the pointers. Since I started from looking ways to implement RS-232, I just got stuck on the idea that bit-banging is always bad, so threw it out without really looking at it. But you're right, it'll work quite well.

I suppose the other lines on the VIA port could be used as SPI chip enable lines. Or if we wanted to get very silly, hook them up to a decoder for more excitement :)

Thanks again.

RS-232 is a pain to bit-bang because of the stringent timing requirements. SPI OTOH has no timing requirements other than the usual setup and hold times which you won't be violating anyway by doing one edge at a time under program control.


That's not silly. You can even multiplex things so you have other interfaces and uses on the same pins. For example, I've put the I²C interface on the SPI's clock and data-in lines (for SPI modes 0 & 3). To protect the SPI from false transactions, just make sure no SPI device is selected when doing I²C operations. To protect the I²C from false transactions, make sure the SPI never transitions the data line while the clock line is high. SPI mode 0 seems to be most common, and would automatically give this protection.

With some planning, you can hook a bazillion things to one 6522, with hardly any compromises.