( I see pogof has posted as I was preparing my own post. I agree with the suggestions mentioned. )
I like to keep the lines of the data bus more or less parallel with one another so they don't cross over one another much. This helps avoid a "rats nest" tangle. Same for the address bus.
One nice thing about the address bus is that only a few of the least-significant lines (eg: A0, A1, A2, A3) extend to all the main chips. The remaining address lines -- the majority -- don't. They connect only to CPU, memory and possibly the decode logic. For this reason it makes sense to keep the CPU and memory chip(s) close together. Wires that don't have far to go make for a tidier board.
The attached images show one possible layout which keeps the memory and CPU close, and also has minimal crossing-over of the address lines and minimal crossing-over of the data lines. Blue is for the data bus, and red is for the address bus. Obviously I haven't drawn all the lines -- in particular, A15-A8 are missing entirely. Mainly I just wanted to illustrate how you can take advantage of the pinouts of the various chips, and get a wiring layout that's fairly orderly.
I hope some of these ideas are helpful. I realize the board you've chosen may have etched pads that lead you in a different direction. But if it's "pad per hole" then you have freedom to orient things any way you please.
Have fun!
Jeff
ps- oops, I omitted the RAM! But, as pogof said, it has almost the same pinout as the ROM, and should go beside it.
Attachment:
layout.png [ 1.06 MiB | Viewed 1747 times ]
Attachment:
buses.png [ 722.64 KiB | Viewed 1747 times ]
_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html