cbscpe wrote:
I fully agree, but still as I said I want to combine it with a flag as not necessary all RTI return to the user (nested interrupts or the NMI occurs during processing of a system call).
That's assuming you are going to permit nested interrupts. When BRK or COP is executed IRQs are automatically masked, which means your ISR would have to intentionally re-enable IRQs once your front-end code has control—that is, after the MPU has toggled VPB and jumped to the start of the BRK or COP handler. However, you then have to have a way to tell the IRQ service routine (ISR) that you are already in supervisor mode, so it doesn't take you back to user mode when the ISR terminates. Such a function would have to be done in hardware, since the memory map could be changing as you switch from one interrupt level to another.
As for NMIs, they are best reserved for one high priority event that cannot be ignored under any circumstances. Using NMIs for routine processing can give rise to hard-to-diagnose deadlock problems (which I discuss in my 65C816 interrupt article). Many systems don't even pay attention to NMIs.
Quote:
You may ask why only 3 User Pages of un-equal size. The answer is I want to use only one Macro Cell per physical memory address line in the ATF1504AS to select the physical address and I have only 5 Product Terms per Macro Cell. This saves resources and minimizes propagation delay.
Atmel's logic doubling feature allows you to "borrow" unused product terms from other MCs, which may help you make a Yorky bark like a Rottweiler.
You may want to add the following to the beginning of your WinCUPL code:
Code:
property atmel {cascade_logic=on};
property atmel {logic_doubling=on}; /* if off, Pterms can't be "borrowed" from other MCs */
property atmel {output_fast=off}; /* set output slew rate to slow, might help with noise issues */
property atmel {pin_keep=off}; /* see data sheet for explanation */
property atmel {preassign=keep}; /* prevents fitter from changing your fixed pin assignments */
property atmel {security=off}; /* security fuse is not blown */
property atmel {xor_synthesis=on};
I suggest you write the logic without pin assignments (except the reset and clock inputs) and let the fitter assign the rest of the pins. If the design fits and synthesizes then use the pin assignments generated by the fitter, which you can find in the
.fit output file. That's how I did the CPLD for POC V2, which is an ATF1504AS with all pins in use. I couldn't get the design to fit with my preferred assignments, so I let the fitter work it out, with only GCLR (connected to /RESET) and GCLK1 (connected to Ø2) specifically assigned to functions.