I've been cleaning up my 65C816 forth for the W65C816SXB so that it can be used. Its not perfect yet but the bulk of it does work. All of the code can be found here:

https://github.com/andrew-jacobs/w65c816sxb-forth

This is a direct threaded implementation which executes in native mode with A, X and Y normally set to 16-bits. A is switched to 8-bits for C@, C! and C,. The forth instruction pointer is kept in Y and the dispatch code (TYX,INY,INY,JMP (0,X)) is inlined through out the code by means of the CONTINUE macro. The direct page register is used as the data stack pointer.

I have a version of the project for the W65C265SXB as well and will upload it tomorrow.

Portions of the code have been translated from Brad's Camel forth implementations for the Z80 and 1802.

I'll continue to add documentation and fix bugs as I find them.

_________________
Andrew Jacobs
6502 & PIC Stuff - http://www.obelisk.me.uk/
Cross-Platform 6502/65C02/65816 Macro Assembler - http://www.obelisk.me.uk/dev65/
Open Source Projects - https://github.com/andrew-jacobs

Very nice, Andrew! A couple of respectful but off-the-cuff comments:

It looks like you forgot a PLY in CMOVE>.

Your X register seems to be underutilized, and you're doing a lot of TDC ... TCD operations to modify your data stack pointer, which is a very common activity. Have you weighed the possibility of going back to X as a data stack pointer? Or how about using X for IP, and leaving Y as a scratch register for your primitives?


If you try X (or even Y) for your data stack pointer, what would TOS-in-A look like?


If you keep Y as IP:

... oh, wait, that's not quite correct ... or is it? I still get confused ...

Keep the DTC candle burning brightly, my 65xx brother!

Mike B.

Really cool! I'm looking forward to reading the code.