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PostPosted: Mon Apr 11, 2016 10:17 pm 
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BigEd wrote:
(I believe cbmeeks already did exactly that - see the message after the one you quoted)

Yep! My eyes continue to give me trouble. For whatever reason, I never saw that message. :evil:

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PostPosted: Mon Apr 11, 2016 10:31 pm 
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I maybe ended up in a similar situation with my breadboard design. I built up a complete system and it didn't work and I couldn't really figure out why. The mistake was having too much complexity to debug all at once. I needed to isolate parts to reduce the complexity. In the end there were very few things wrong, but it was just a problem of identifying exactly what was wrong. Also I wasn't confident in my test equipment and got some results that I couldn't explain with the scope. I've got a logic-8 that my dog converted into a logic-4 by eating half the wires and that proved to be quite helpful.

Adding a DS1813 I think will be helpful, one of my problems was not having a clean reset, it's good to know that your system will start reliably. Anything you can do to reduce randomness is very helpful. On my breadboard I've got no bypass capacitors and the clock looks very messy and it all still works reliably. I'm running at 1.8 MHz and my ACIA is reliably working at 115,200 which I think is a good result.

Next I'd try the NOP or JMP type test and look at the address bus to make sure that it makes sense. This will confirm that the CPU is working correctly. I think you've already done this.

Then I'd try a very simple program. You don't need to replace the ACIA with a VIA to get a LED blinking, you can use some of the serial control lines just like GPIO pins. I haven't done this myself but is shouldn't be hard. Try writing code that does not rely on the RAM at all so you can isolate this from the test. That means no stack or zero page usage, but to blink an LED that shouldn't be a problem. This will confirm that your CPU, ROM, ACIA and address decoding are working. Look at the select lines to confirm that the ACIA is getting accessed in a pattern that makes sense. Disable interrupts at the start of this code just to eliminate that as a possible problem. I kind of skipped this step by going straight to a test using a character LCD, but it was a similar process. Once I had output to the LCD I could perform much more testing. The LCD connects directly to the address bus so is quite simple to get going. I actually wired up the LCD on a breadboard and hand toggled the lines to ensure that my understanding of the steps to print a character worked. You can set the data bus values then toggle the E line to write a value, it's not that hard to display text by hand, then you can just take those steps and write the equivalent code as a test.

Then you can move on to a simple serial test, like sending a character. This will confirm that you have the baud rate correct and the ACIA is working, and you can move on from there adding more functionality. It's really useful to have some way of debugging the code, I'd sometimes run some new code and get nothing, and have no idea where it failed. When that happened I printed characters to the display to show where the code was up to, you could do the same with the serial port. You could write a RAM test, I didn't do this as I tried some code that used the RAM and it worked, so that was good enough for me.


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PostPosted: Mon Apr 11, 2016 10:57 pm 
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If you're using a WDC W65C51 ACIA, you should check the Lot number etched on the chip. The last batch WDC (lot A6A749.1) released are flawed and the Xmit bit is stuck on in the status register. From a programming view, this means the chip is always ready to accept the next byte. The latest batch also requires the 1M resistor in parallel with the Xtal or the Baud generator will not work correctly. The latest Datasheet (October 24th, 2014) documents the problem.

If you have this Lot number (above) you'll need to change the transmit code to introduce a time delay to allow one byte to be sent before attempting to send another. In short, you can't use the Xmit bit in the status register to query the chip. Sorry to be the bearer of bad news, but it took me some time to figure this out. There's also another thread documenting this.

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PostPosted: Mon Apr 11, 2016 11:31 pm 
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jds shows an excellent debugging thought process above.  The 6502 primer has a page on simple debugging methods, at http://wilsonminesco.com/6502primer/debug.html .  I have the two less-important (#2 and #3) AICAs on my workbench computer each feed a couple of LEDs as status indicators on the front, intended for debugging, on RTS\ and DTR\.  (An example command in Forth is "TURN ON #4 LED".)

floobydust did the community a great favor by figuring out the W65C51 bug and telling us all about it and alerting WDC about it.  The topic is at viewtopic.php?f=4&t=2543 .

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PostPosted: Tue Apr 12, 2016 8:32 pm 
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Small update.

Unfortunately, I literally only got about 10 minutes to fiddle with it last night (the circuit that is!!). I hope to have more time tonight. I started drawing up some real schematics on what I have *AND* what I hope to build.

Last night, I connected a 1M ohm resistor between pins 6 and 7 of the ACIA and left the 22pf cap on pin 6 to GND. Still nothing.

What's interesting, however, is that when I press my mechanical reset button, I can see the TX light briefly but nothing comes over. BUT, when I power down the circuit, I get a few characters of garbage on my terminal. It's funny, actually. Because I have so many large caps all over the place, I can watch the signals on my scope slowly flat line 4-5 seconds after there is no power! HA! Those caps are powering the circuit for a few seconds with no external power. lol

GARTHWILSON wrote:
Admittedly, it is a bit expensive. I suppose it's losing the economy of scale, meaning that with people gradually using less and less, manufacturers have to charge more per socket, hundred feet of wire, etc. to justify continuing production.


I'm still interested in getting into it. Is there a list somewhere that tells you exactly what to get when starting out WW'ing? I know I need a WW tool, but what else?


banedon wrote:
A circuit diagram made by you looking at your circuit as it is now is definitely needed as others have said - even if hand drawn and scanned in.


It's on my list. I will try and get something drawn up soon.

banedon wrote:
Also, it may be worth single cycling the circuit. I.e. instead of the entire circuit running at full speed, replace the PHI2 crystal with the following circuit...


Now that is really cool! In fact, I might solder up something like that on a little protoboard and use it for when I want to single step the CPU. Great idea.

jds wrote:
I maybe ended up in a similar situation with my breadboard design. I built up a complete system and it didn't work and I couldn't really figure out why. The mistake was having too much complexity to debug all at once.


I've had the same issues with other circuits in the past. This is actually a result of me isolating things to get a better understanding. The first test I did was just the 65C02 running NOPS and checking it with my scope. That worked well. So step two was to put the ROM and ACIA...which is failing. So, I certainly skipped ahead. Tonight, I'm going to take a step back and get just the CPU and ROM working with some test code running from ROM. Once that is done, and I "sign off" on the CPU and ROM, I will tackle the ACIA (or, maybe even a VIA) next.

jds wrote:
Adding a DS1813 I think will be helpful, one of my problems was not having a clean reset, it's good to know that your system will start reliably. Anything you can do to reduce randomness is very helpful.


I couldn't agree more. I have some DS1813's on their way. In the meantime, I may solder up a simple 555 reset circuit. Between that little nugget and a single-step circuit, it should make it easier to debug. Knowing my 555 reset works and my single step works will be really helpful.

jds wrote:
On my breadboard I've got no bypass capacitors and the clock looks very messy and it all still works reliably. I'm running at 1.8 MHz and my ACIA is reliably working at 115,200 which I think is a good result.


That is very promising. My target speed is going to be 1.79 MHz total. A throw-back to the days of timing your CPU to the NTSC colorburst. Plus, the AY-3-8912 sound chips I plan on using needs multiples of that anyway. Besides, I'm old-school and I appreciate that 1-4 MHz is FAST for an 8-bit computer.

jds wrote:
Try writing code that does not rely on the RAM at all so you can isolate this from the test.


I hope to do that with my ROM next. I thought about writing a program that has a delay at some low address. Then, jump to a high address, tiny delay, and then back to the low address for a long delay. Then, monitor the upper address pins on my scope to see if I can get some resemblance of a square wave.

Once that is done, and I know my ROM is good, I will start with I/O again.

floobydust wrote:
If you're using a WDC W65C51 ACIA, you should check the Lot number etched on the chip. The last batch WDC (lot A6A749.1) released are flawed and the Xmit bit is stuck on in the status register. From a programming view, this means the chip is always ready to accept the next byte. The latest batch also requires the 1M resistor in parallel with the Xtal or the Baud generator will not work correctly. The latest Datasheet (October 24th, 2014) documents the problem.

If you have this Lot number (above) you'll need to change the transmit code to introduce a time delay to allow one byte to be sent before attempting to send another. In short, you can't use the Xmit bit in the status register to query the chip. Sorry to be the bearer of bad news, but it took me some time to figure this out. There's also another thread documenting this.


This is a very interesting bit of information. I forgot to check the lot code last night but I will try to remember and check it tonight. I only have one ACIA so hopefully it's not the defective one.

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PostPosted: Tue Apr 12, 2016 8:43 pm 
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Are you quite sure you've tied off the serial flow control lines the right way? I can never remember which is which, but if you tie them wrong it will prevent transmission.


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PostPosted: Tue Apr 12, 2016 8:57 pm 
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BigEd wrote:
Are you quite sure you've tied off the serial flow control lines the right way? I can never remember which is which, but if you tie them wrong it will prevent transmission.


99% sure.

TX from ACIA to RX of PropPlug
RX from ACIA to TX of PropPlug
GND to GND

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PostPosted: Tue Apr 12, 2016 8:59 pm 
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Ah, I was thinking of CTS and DTR.


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PostPosted: Tue Apr 12, 2016 10:36 pm 
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Regarding wire-wrap,
cbmeeks wrote:
GARTHWILSON wrote:
Admittedly, it is a bit expensive. I suppose it's losing the economy of scale, meaning that with people gradually using less and less, manufacturers have to charge more per socket, hundred feet of wire, etc. to justify continuing production.

I'm still interested in getting into it. Is there a list somewhere that tells you exactly what to get when starting out WW'ing? I know I need a WW tool, but what else?

The WW section of the 6502 primer should answer that.  Let me know if you have more questions, and I might add to it.

It does seem that most of the things you bring up are addressed in the 6502 primer.  I highly recommend reading through it, more or less from beginning to end (rather than skipping around), as it is logically organized in steps.  It's not a tutorial, but rather a primer, going through all the considerations you'll need to successfully design and build your own 6502 computer.  It gets updated regularly.

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PostPosted: Tue Apr 12, 2016 11:11 pm 
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GARTHWILSON wrote:
It does seem that most of the things you bring up are addressed in the 6502 primer. I highly recommend reading through it,


Oh, I have. Many times. :-)

It may not all sink in immediately, but it's been a part of my daily reading material.

OK, at the bench now.

I have wired up a proper reset circuit, confirmed that the ACIA is getting a 1.8xxxMHz clock, and put a 1M Ohm resistor between 6/7.

The LOT ID for the ACIA is A6A749.1. Wouldn't you know it.

I'm going to rip the ACIA out and focus on my ROM. Once that works, I will try a VIA and then tackle the ACIA again.

Thanks for all the help!

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PostPosted: Wed Apr 13, 2016 12:07 am 
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Another update.

Some success! I pulled the ACIA out and now have the CPU and ROM.

Here is my code:

Code:
          .org $1000

loop:     lda #$AA
          jmp loop


My scope shows:

Code:
A15 to A13 LOW

A12 HIGH

A11 to A3 LOW

A2 about 20% HIGH and 80% LOW
A1 - not sure of % but a little less than 50%
A0 about 50% HIGH/LOW



So it appears to be running my code and jumping to $1000 forever.

** EDIT **
Added some pics. Not sure why preview has them upside down but opening them up is fine.


Attachments:
File comment: A2
A2.jpg
A2.jpg [ 1.61 MiB | Viewed 885 times ]
File comment: A1
A1.jpg
A1.jpg [ 1.65 MiB | Viewed 885 times ]
File comment: A0
A0.jpg
A0.jpg [ 1.68 MiB | Viewed 885 times ]
Photo Apr 12, 8 09 45 PM.jpg
Photo Apr 12, 8 09 45 PM.jpg [ 2.19 MiB | Viewed 885 times ]
Photo Apr 12, 8 09 30 PM.jpg
Photo Apr 12, 8 09 30 PM.jpg [ 2.04 MiB | Viewed 885 times ]

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