floobydust wrote:
As I've been reworking my Monitor and BIOS, I've been using some page zero locations as flags for certain operations...I've started using some of the SMB/RMB and BBS/BBR instructions...Granted, these instructions don't exist with the W65C816, so using them limits you to either the Rockwell R65C02 and the W65C02.
Don't forget
TRB and
TSB, which do exist in the 65C816 and, in my opinion, are generally more useful. Both perform two operations: a logical
AND of the accumulator (
.A) with memory that is the same in effect as the
BIT instruction, and clearing (
TRB) or setting (
TSB) memory bits according to the mask in
.A. The
AND operation occurs before the masking operation, so the instruction also tells you what the status of the affected location was prior to being "touched."
TRB and
TSB can test and clear/set 16 bits in one operation with the 65C816 if the
m bit in
SR is cleared.
I use
TRB and
TSB quite a bit(!) in the device driver sections of POC V1's firmware. For example, there is a one byte bit field that keeps track of the status of the DUART's transmitters (enabled or disabled).
TRB will tell me if a transmitter is enabled (bit cleared) and
TSB will tell me if a transmitter is disabled (bit set). So I can do something like:
Code:
lda #%00000010 ;channel B TxD mask
trb txdstat ;channel B already enabled?
beq okhere ;yes...
;
; ———————————————————————————————————————————————————————————————
; Note that TRB implicitly clears the chan B status bit...nothing
; further is required to maintain the status. If the bit was set
; we fall through & enable TxD.
; ———————————————————————————————————————————————————————————————
;
lda #txdenab ;load TxD enable command &...
sta duart+txdctlb ;enable channel B TxD
;
okhere ...program continues...
In the above, I get double duty with the
TRB TXDSTAT instruction. Since the logical
AND of .A with
TXDSTAT occurs before any bits are touched, the MPU will fall through and enable TxD if the corresponding status bit was set.
Unlike
BBRx,
BBSx,
RMB and
SMB, which only address zero page,
TRB and
TSB are able to manipulate single or multiple bits anywhere in the MPU's address space.