So, the one bit ALU I built has "AND" , "OR" and "ADD". For the 6502 I will have to add, at least, an "XOR", and a full-adder-with-carryin-and-carry-out-altered-to-a-subtractor [for the SBC instruction]. Also, the compare bits instructions, CMP, and compare X, compare S, might be ALU too? I don't know, yet.

But I think the other instructions seem to involve control or memory, and thus, belong to some other aspect of the 6502. I should watch the michael steil (forgot his name; sorry if that's wrong) video of the 6502 reverse engineering. he has a good summation of the instruction set and where they belong; how they can be grouped.

I think, for a preliminary mock-up, I can lay the 6502 groundwork without understanding what I am doing, yet. Start with address and data pins, leave room for the ROM decoding (though i understand nothing about this block; it seems an incomprehensible, square array of wires? perhaps weste/eshraghain "CMOS VLSI"will give insight as to how these are manufactured?). Place, roughly, the 6502 ALU, and a few of the registers nearby, and practice my redstone-flip flops and redstone-latches (as those are very clearly marked on the NES rev D "colored overlay" schematic). I could throw a quick clock together, and practice getting the Phi 1 and Phi 2 outputs. The Phi 0 input pin should be easy.

What parts of the 6502 use which signals (Phi 0 and Phi 1 and Phi 2)? is Rev D NMOS (just in case I need to study it at "IC layout level" of detail)?

No time. Here is a post I made in a private message. It illustrates yesterday's progress (and the day before, too).


P.P.S. I started a "rough draft" in minecraft, of the 6502 rev D (i.e. NESbreak; colored version, with drawing overlay). I am just building the S, X, Y , Acc, PCH, PCL registers (using D latches, I think? Hard to say what I am using , since minecraft doesn't use "transistors", per se), maybe looking at building a clock (Phi0, Phi1, Phi2), placing the "pins", especially A0-A15 and D0-D7.

Roughed out an "area" for a decode ROM, but must confess to partial cluelessness on how to implement such a device, either in reality or in "minecraft-space".

ALU, I did not see, specifically labelled on the NES Break diagram? Maybe I missed it? I think it is right above the S, X, and Y registers and ACC and PCH, PCL? But below the Decode ROM?

I'll figure it out. I am concerned that the "minecraft timing" will not be good enough to synchronize all the events that must be synchronized? It doesn't help that I don't really know how the original 6502 keeps all that stuff straight, in the first place! If I have to, when hooking together the separate elements (i.e. registers, ALU, ROM-decoders, Buses), maybe I could implement an extra "level" of "synchronization assurance"... i.e. a level of "hold/ready/wait" states that doesn't necessarily exist in the real chip? I don't know, really, for sure? It is just a thought, in case I run into trouble. I will stick to the schematic, first.

Also, can you give me a quick word about how to read that damn diagram!? Sometimes I think I am pretty smart about computer science and engineering, but I can't make heads or tails of the transistor overlay drawing!!!!!!????!!!! Should be "kids stuff", shouldn't it?

I'll check the 6502vis page again. I forgot to see if (1) 350 mils was the lateral side of the chip and (2) if the NES break "6502 rev D" chip is/was a NMOS chip. The latter info is only useful if am forced to look at IC layout, the former I have guessed at and implemented in the minecraft game, already. I figure 350 mils = 0.350 inches = approx. 9000 um = 250 "minecraft blocks" @ 38 um per block.

I arrived at these numbers by (9000*9000) / (3510 transistors in a 6502). Then I guessed that the average minecraft "logic gate" was 4 block X 4 blocks (a high estimate, I think), to arrive at the 38 um (i.e. in real life, in silicon) per minecraft block, value.

All in all, I think it is a good start. there should be plenty of room, and if there isn't, I can always build up! (at least 255 layers up, but there needs to be one separation layer, at least, between circuits, so , practically speaking, 127 or so.).

Yesterday, I got the minecraft, 1 bit ALU working (mostly). I had a stumbling block, though. I can't remember how ALUs work! Ha Ha! Not quite. What I mean, is, there are three switches to this one bit ALU (1) ADD, (2) And, (3) OR. For the 6502, I will need to add XOR, at the very least, and, maybe SBC (full subtractor?), and maybe even CMP (CMP instructions of the 6502? are they implemented in the ALU?)? Well, I can check the Michael Steil (still can't remember if that's his name?) youtube presentation of the reverse engineering, as he has done a good job grouping the instructions together so newbies can understand them.

My stumbling is this. Does the carry-in bit ever get applied to the logical functions? If so, how does it affect them? If not, how does one separate that from the ADD or SBC functions?

I am pretty sure the carry bit should be excluded from logical functions, and will research wikipedia and Wakerley digital logic textbook to verify. a word from you might help, too. thanks. Otherwise, my 8 bit minecraft Full adder works, and when I get an hour so (or 2 or 3) I can copy the minecraft ALU times 8 to get something that looks like the 6502 ALU; so things are coming along swimmingly.

I should alter the ALU, before I layout all 8 of them. And after laying out two of them, I should check to see that the carry ins and carry-outs do as they are supposed to do. That website you sent , showing the redstone schematic generators will be a great help, I think. Thanks again.

1 edit; deleted 1 opening sentence; it was nonsense? oops!

Plenty has been written about the operation of the 6502 ALU. This page turned up on a search:
http://6502.org/users/dieter/a2/a2_8.htm

Thanks again. perfect for what I need. Again, sheepish for not having searched it out myself (but it sometimes helsps to have a human offer answers; google is not-yet All-knowing!).

One hopes my efforts in 6502 make your efforts worthwhile.

Maybe I'll have a 6502-ish minecraft 8 bit ALU by the end of the weekend!? I'll try to post on ou-yay-ube-tay!

It's possible that you have already seen this map, Randall, but I'll link it for you anyway:

http://www.applelogic.org/files/6502SCHEMATIC.pdf

Theoretically, you could build a complete 6502 as illustrated without knowing every detail of what's going on at the gate level, but there's a significant chance that something of that level of complexity will need to be debugged by an expert before it would be able to spring to life. It looks like you might have to spend more than a weekend for a proper go ... unless you possess extraordinary abilities of which I'm not aware.

Mike B.

(That's an instance of Balazs' schematic Mike - a great resource, but not quite complete and correct. Not too surprising, as it's a manual translation from microphotographs, without the benefit of any way to debug it. The visual6502 has the great advantage of being both a netlist and a simulation - the simulation passes Klaus' tests, and everything else that's been thrown at it. It did have a bigger team and more modern tools available.)

Yeah me and the kid started building a pyramid (to scale, which is a ridiculous thing to do in minecraft space. I suppose I shouldn't complain since the slaves were physically moving HUGE blocks, but my moving a near-infinite series of 1 m X 1 m blocks (I assumed the minecraft guy is 6 foot something tall, thus two blocks high) is tedious work, even if it is only "virtual work").

progress on the 6502-minecraft project? I can't rule out laziness or stupidity (on my part), or incompetence. I have seen most of the schematics and have little excuse for letting the project languish. I suppose other things have occurred. I am studying RAM, in a big way, and have been up and down through digikeys webpages looking for what is possible and actual and affordable. I am disappointed in dual port RAM, as I want lots of it, at cheap prices. For a moment , there, I thought FLASH RAM would do the job I wanted it to, but I think I will settle on DDR SDRAM. Bummer, since I wanted to avoid refreshes, synchronous clocking, and multiplexed buses. Whoops, that all belongs on my own project page. I digress.

I have been looking at Weste and Eshrgahian, again, and realized that all adders are not created equal (ripple adders, etc.). I might get into that logic fairly soon. I think, me and mariobrains (AKA PandaPro) will probably build a "silicon zoo", "logic zoo", and/or "digital zoo". I have the logic gates with their signs in front of them, and will probably add some clocks, ALUs, adders, subtractors, RAM cells, ROM cells, counters, flip flops, latches, etc.

Meticulous signage might be important here.

As for the thing you guys are most interested in, the "minecraft-instantiation-of-6502", as a fait accompli, I think any further progress is bumped for at least a couple weeks. I simply don't have the "know-how", whether of "6502-ness" or, "minecraft-i-ness", to get the job done.

I must study timing of minecraft clocks, and issues of synchronization, especially.

Thanks for the docs and pics. I have most of what I need to "rough it out", but to make it function, I think will be almost as tough as if I was doing it in silicon. I also need to learn how to read the transistor schematics (and do these translate easily into "redstone devices"? Probably not? Logic gates are pretty easy, but I don't know if there is a "PMOS" or "NMOS" device in the "redstone world"?). It might be easiest for me to look at the 6502 schematics and break them into functional blocks, and then "hack" a redtsone solution from the "gate elements", i.e. not at the transistor level? I dunno. I should web search "redstone and transistor" to see what comes up?

Better news is, I got a Jameco order the other day; 6522 (rockwell, so I might have to study that datasheet instead of the WDC one I have looked at, so far) and I had forgotten, so I was happily surprised when my order came with a 65C02! Forgot I ordered that. Maybe give it to Mariobrains (I think it is a Rockwell too? I forgot to look at the logo on the chip?). Also, got a few "piano DIP switches", for possible use in the 6502-opoly game.

But first priority, these days, is getting my image sensor/'816 project "back on track". I think some bus FET switches are in order, so I am online searching your pages for references to that. Garth mentions one here http://forum.6502.org/viewtopic.php?f=4&t=2438&p=35117&hilit=Bus+FET+Switch#p35117, part # 74bct3245 (I had searched on digikey and come up with a similar part # : SN74CBTLV3384). They're cheap, so maybe it won't hurt to order a few, to have on hand. I'll look around at what other solutions have, historically, been implemented.

It would be nice, in my main project, to leave the "raw video bits"--mostly--on a private bus (and dedicated memory system), and only occasionally use the '816 to grab a frame or two.

(The dual port SRAM I had decided was affordable, is WHOLLY inappropriate for the data rates I am looking at. Why did it take me a week to notice? I dunno? No excuse. Just inexperience and novelty of the whole enterprise (i.e. digital design)! So, SDRAM is looking better all the time; but I have to learn how to use it, now.)

Also, my Jameco order included a 7805 for mariobrains. Not the best holiday present on the block, but one that includes a fair amount of forethought (I'll bet he's the only 11 year old in our town who owns his very own 5V regulator!).

Maybe I'll go stop by his house and bring him down to the library; we could start a "first, TTL 4-bit computer" post for him. I know it wouldn't be "6502-relevant", but if we get it working quickly (with 74xx), we could use the same post to get him started on the 65C02. And, as with any child of video-game playing age, I'd like to see him programming his computers, instead of letting his computers program him!

Well [to barry], I did get the one-bit ALU working, but have to add a XOR into the redstone design/schematic (the ALU schematic I got on the internet didn't have a XOR, but the 6502 appears to.).

Since Weste and Eshraghian mentioned that ripple adders have significant delay when "chained together" into wider words, I suppose it won't be easy to scale up the ALU to 8 bits, either. But, then again, maybe minecraft is not that complicated? Its just a game, right?

Well, now that I have "run at the mouth", or technically, "run at the keyboard", I am feeling a bit inspired? Perhaps I'll print the Balzac Schematic (since logic gates and sections are labelled, fairly precisely) and maybe print a copy of the colored overlay 6502vis reverse engineering schematic, and go home and give the game a try? I've probably done enough ('816/IC-shopping/pdf-downloading and reading) work for today! (Tomorrow, at least, I should find some "cycle counter ICs" that can activate my "bus FET switches", to help with my memory management. Is that the right thing to do? I dunno. But it seems (a) cheap and (b) a feasible solution to my perceived problem. A closer study of DMA--and specifically the 8237 chip, might still be warranted.).

Thanks again for the redstone schematic generator link. I should load the ALU schematic that I have already, and then try to add a XOR, and then post a photo of it here. Maybe tomorrow or the next day, I will be THAT organized.

Feeling foolish. I should be doing more serious "work". Here is a thread about minecraft "electronics" that, while starting out facile and occasionally "snarky", actually ends up revealing a depth of the "minecraft electronics paradigm" that I had hoped not to enter into.

Several posters at this link http://www.minecraftforum.net/forums/minecraft-discussion/redstone-discussion-and/redstone-creations/353056-how-to-make-a-transistor?page=2 indicate minecraft "redstone" is not electricity, and thus, transistors are impossible. I am inclined to agree, but I don't know enough about redstone yet to be certain (and my transistor knowledge can be fuzzy sometimes, too!).

I guess VCC can be achieved (switch/ redstone-path, redstone block/ etc.), but GND? OR Negative VSS?

By the end of the page (link above) the conversation's participants are discussing pulse width modulation. Seems an advanced enough topic to be interesting, I think?

Maybe my "silicon zoo" should try to make something more directly analagous to "MOSFETs", "JFETs", and/or NPN-PNP? Maybe some "transistors" acting as amplifiers, and some as switches? I dunno.

Perhaps a 6502 plan can proceed from a mere "logic gate" level of design?

It's a common problem - I may even have mentioned it on this thread - that simple logic simulations can't handle bidirectional elements. The 6502 does have 16 pass transistors which act bidirectionally and so anyone trying to build an accurate logical reimplementation of the 6502 will need a plan to deal with that. It's likely that a relatively simple tweak of the design can do the trick: for each of the two byte-wide transceivers you need a signal to control the direction of drive.

For details of what to do in redstone, that forum you linked to looks like the forum to be using.

Yeah, I have printed out Balz and NESBreak schematics (BIG prints; 9 pages each!); hung them up on the wall and colored a few regions; I think the Balz design is CMOS and the Break is NMOS? But not sure. I have tried to reconcile both with one another, in my head, and it seems possible to do so. I can recognize the major functional blocks in both diagrams and have started to implement them in minecraft world. (Though I have trouble finding the ALU, or, for that matter, the Accumulator? I think the Accumulator is the unlabelled set of flip flops directly to the left of program counter H and L, on the NESbbreak photomicrograph? I think the ALU is directly underneath the decode ROM, but above the registers (S,Y,X,PCH,PCL, etc)? Not sure?). The Balz schematic doesn't exactly line up with the actual physical layout, but might help to trace "control" lines?

oops! I almost forgot; I will do it right now! I must print out the functional schematic (one page), showing the two buses! That might help alot, too!

Was looking through the forum and noticed that a "mod" is needed to make a good "redstone computer". An "instant repeater" is needed, and maybe I have to find a download. This seems annoying, and maybe will shelve my project?

I will try to post short bits of schematic, if anybody else wants to pick up the project. Also, probably post a vid to youtube of what was attempted. If I try more, it will be out of sheer curiosity for "redstone" and 6502.

Bidirectional element seems interesting. You had mentioned it before and I had noted it, but not thought much about it. I am just understanding the "clocks" in redstone, but how to keep things "in phase" seems a mystery, to me, at the moment.

I noted the part of the NESBreak schematic labelled "Phi 2 pullup". Wasn't sure, but I figures the lower half of the chip needed a "boost" to the clock signal, due to fanout and/or capacitance? not sure. The vis6502 layout files show metallization here, and so, I think, after generating the clock(s?), "up north", I will send a signal directly to the "mid-section" of the "redstone chip". If I can manage to keep those things "in phase"/"in synchronization", then maybe the "chip" has a chance.

I will look for the "instant repeater mod", but it might be more trouble than it is worth. I could just run a "slow-6502-redstone-processor", without the mod?

Perhaps I let this thread go quiescent, for now? I have been looking at memory management and cycle counters (binary counter ICs) and Bus switches (fast!), and I really should focus on my REAL project! Cheers, all!

OK, fairly certain Balaz is a CMOS design. His schematic shows both enhancement and depletion mode transistors.

Also, whilst researching things, I notice that the Intel 4004 was a PMOS device. I did not know that! (I learn new things every day!).

I have been looking at the minecraft forums, and searching for "transistor", but few people seem to want to investigate transistor level design in minecraft? Curious? I would think it would be FIRST PRIORITY! Well, I think a redstone-comparator, with a smidgen of finagling, could do the job admirably? But, the search continues!

Indeed, the 4004 was PMOS - it's a simpler process, but lower performance. In fact Balazs' and Breaks' schematics are of the same NMOS device. You're right that Balazs shows both enhancement and depletion mode devices, but these are both NMOS devices and they are what you'll find on an NMOS 6502. The ALU is part of the datapath. It is between the registers and the PC. I think I posted an orientation diagram previously.