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 Post subject: 65C02GPD v2
PostPosted: Tue Jan 12, 2016 2:08 pm 
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Hi guys

I’m planning the next revision of my 65C02GPD design (v2).

As part of that, I’m looking into changes that I want to make. Here’s my list so far:

- Change the CPU and VIA’s from DIP packages to PLCC. Affords more room on the PCB.
- Change the DIP socketed 55ns RAM to 10 or 12ns soldered SOJ RAM
- Change the single row pin headers used by the VIAs to IDC sockets
- Add two additional VIAs for a total of three.
- One VIA to be a system VIA and deal with onboard devices (see below)
- Add an I2C BIOS settings EEPROM - attached to system VIA
- Add an I2C user settings EEPROM – attached to system VIA
- Add an I2C real time clock (RTC) module – attached to system VIA
- Add an external set timer – attached to system VIA
- Add a buzzer/sound header – attached to system VIA
- Add VGA or HDMI display
- Replace the WDC 65C51 with a different ACIA

Questions

ACIA: Can anyone suggest a suitable replacement for the WDC 65C51? It needs to tolerate 14MHz at least (hopefully higher). I’ve looked around in the past for such a device but could only find low speed ones.

VIDEO: This is something that I would dearly like to add to the design, but have no experience with.
I know in the past that the RAM was shared between the video circuitry and the main buses (the BBC micro uses a ‘245 buffer for this). The master clock is split down into two clocks which are 180 degrees out of phase with one another. I.e. when one is high the other is low and vice versa.
One clock is used as PHI2 and the other is the video clock. When PHI2 is low, the video clock is high and the ‘245 buffer is disabled thus allowing the video circuitry access to the RAM without risk of contention. When PHI2 is high, the ‘245 is enabled,, thus allowing the CPU access to the RAM.
Is it still done this way? Also, does anyone have access to a details (but simple) guide?


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 Post subject: Re: 65C02GPD v2
PostPosted: Tue Jan 12, 2016 3:14 pm 
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banedon wrote:
ACIA: Can anyone suggest a suitable replacement for the WDC 65C51? It needs to tolerate 14MHz at least (hopefully higher). I’ve looked around in the past for such a device but could only find low speed ones.

Depending on how many channels you want, I suggest the Philips/NXP SC28L91 (one channel), SC28L92 (two channels) or SC28L194 (four channels). All three have a common programming model, 16-deep FIFOs on both RxD and TxD, and excellent performance, with a maximum standard data rate of 230.4 Kbps and 960 Kbps using a non-standard setup. I'm currently running the 28L92 in POC at 115.2 Kbps on both channels, with Ø2 at 12.5 MHz. I have tested it at 15 MHz.

The SC28L series can be configured to work with either an Intel or Motorola 68K bus interface. In POC, I used the Intel setup, as it turned out to be easier to interface to the 65C816. Also, I used a 3.6864 MHz oscillator instead of a crystal. The link to the TIA-232 lines is through a MAX-238. POC V2 will use the MAX-248, since it will have four TIA-232 ports instead of two.

Attachment:
File comment: SC28L91 Single Channel UART
uart_dual_28L91.pdf [268.4 KiB]
Downloaded 80 times
Attachment:
File comment: SC28L92 Dual Channel UART
uart_dual_28L92.pdf [336.96 KiB]
Downloaded 95 times
Attachment:
File comment: SC28L194 Quad Channel UART
uart_quad_28L194.pdf [318.01 KiB]
Downloaded 79 times

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Last edited by BigDumbDinosaur on Wed Jan 13, 2016 2:57 am, edited 1 time in total.

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 Post subject: Re: 65C02GPD v2
PostPosted: Tue Jan 12, 2016 7:59 pm 
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What are the requirements of the video in respect of colors and resolution? For simple text displays I use dual port RAM, large DP RAM are normally only available in packages with very low pitch, 0.5mm.


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 Post subject: Re: 65C02GPD v2
PostPosted: Tue Jan 12, 2016 8:49 pm 
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banedon wrote:
- Add two additional VIAs for a total of three.

That's what I have on my workbench computer. With some creativity, it has always been enough, although a fourth one might have made things a little easier sometimes.

Quote:
- One VIA to be a system VIA and deal with onboard devices (see below)

I have not made rigid dividing lines like that. One of my VIAs is mostly for the computer's own stuff—keypad, beeper, RTC, LCD, printer, I²C, oscilloscope graphics, and abort button, yes, all that on one VIA, and mostly simultaneously—while the other two which are mostly available for projects also handle the SS22 synchronous-serial interface, A/D converter, D/A converter, 65SIB port, 1-Wire interface, and PC keyboard. There is some distribution though, like that the A/D's RD\ is on VIA1 while the data are read on VIA2.

Quote:
- Add an I2C BIOS settings EEPROM - attached to system VIA
- Add an I2C user settings EEPROM – attached to system VIA
- Add an I2C real time clock (RTC) module – attached to system VIA

Remember you can put all of these on the same I²C port, as long as they all have different addresses.

Quote:
- Add an external set timer – attached to system VIA

What is this? Is it something the VIAs' own timers cannot do? The CA and CB pins have interrupt-on-change capability.

Quote:
- Add a buzzer/sound header – attached to system VIA

I put mine on PB7, to take advantage of the possibility of having T1 in free-run mode toggle the pin with every T1 time-out without software having to babysit it. The software can tell it the frequency and then set it to run, then go away and do something else useful until the end of the beep, then come back and tell it to stop.

Quote:
Can anyone suggest a suitable replacement for the WDC 65C51?

I've been threatening to use the SPI-interfaced MAX3100 UART in 14-pin DIP next time. It goes up to 230kbps with a 3.6864MHz crystal and saves a lot of board space. I've exercised it before but have not put it into useful service so far. The MAX3110 is a MAX3100 plus line drivers and receivers built in. Unfortunately that one (the 3110) is not available in DIP, but in SO-28 which you can put on an SOIC-to-DIP adapter. The MAX3111 is the 3.3V version.

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 Post subject: Re: 65C02GPD v2
PostPosted: Tue Jan 12, 2016 10:03 pm 
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Some other things to consider, though I don't really know what the "theme" of your computer is...:

- A to D converters?
- D to A converters?
- A header for I2C "expansions", though of course any one of your VIA expansion headers could be used
- Mass storage? CF/IDE, SD card, etc?
- Keyboard?

From the looks of it you have everything, except a keyboard, to make the computer "stand alone". So I'd definitely give some thought as to what kind of keyboard you might want to connect up, even if you don't see a need for it right away.

Video is going to be interesting. There are many choices. AVRs seem a popular one, or a TMS9918, or the beeb style MC6845 if you want to go more "retro". HDMI is probably going to be extremely difficult.

What are you using for glue?

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 Post subject: Re: 65C02GPD v2
PostPosted: Wed Jan 13, 2016 11:13 am 
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Keyboard and SD card are a good idea, although I still need to learn how to bit bang SPI for the latter. I think there's a PS2 to VIA web page article somewhere online where I saw how to do the PS2 keyboard.
With regard to timers: As I might be swapping different speed oscillators in and out it means that timing will also vary. If I have an external timer than that shouldn't be a problem.
Not sure that I need A/D, D/A converters at the moment, but that might be down to me just not having experimented with them in the past: I'll look into implementiong at leats one of each.

One larger issue I have is board space. The max I can have is 180mm x 100mm (I think that's the maximum) due to my licensed version of Eagle. Means things might get a bit crowded. I was thinking that if I minimise the through-hole components then I can possibly have some SMDs on the underside.

My main issue with video with regard to the older devices such as TMS9918 and MC6845 is that they are designed for slower speeds and I fear that mu board will be too fast. This is is a pity as I'd planned to put in an SA5050 IC which would give me the nice fonts that teletext uses (also only uses 1 byte per screen character). Unfortunately, the max speed seems to be 6MHz if I'm reading the data sheet correctly. Might go with an AVR as these might be able to cope with the speed, although even these might be a bit slow as things are running in software on the uP.


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 Post subject: Re: 65C02GPD v2
PostPosted: Wed Jan 13, 2016 6:32 pm 
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banedon wrote:
Keyboard and SD card are a good idea, although I still need to learn how to bit bang SPI for the latter.

I discuss SPI bit-banging here, and there's source code linked. Note there also Jeff's tricks to get single-cycle I/O (with '02, not '816) for faster bit-banging. I have not done SD card myself, but I thought André Fachat, a member here, has done it on 6502 and documented it in his pages here, but I'm not finding it at the moment. Maybe someone can remind me of anyone else here who has done it. However, from my links page:
SD-card SPI Maxim ap note (.pdf)
SD/MMC cards, using in SPI mode
SD/MMC/SDHC card library
SD card "drive" for Apple II on Hack-a-Day


Quote:
I think there's a PS2 to VIA web page article somewhere online where I saw how to do the PS2 keyboard.

Daryl's page, with source code linked, should help, at http://sbc.rictor.org/pckb6522.html .

Quote:
With regard to timers: As I might be swapping different speed oscillators in and out it means that timing will also vary. If I have an external timer than that shouldn't be a problem.

Note that one of the VIA's T2's modes allows you to count pulses coming in from outside on PB6, then generating an interrupt when you reach your chosen number of pulses, which won't depend on the Φ2 rate. However, if you do know your Φ2 rate, you can also use it as a frequency counter for the PB6 input pin. (There's a lot of this kind of thing in the Tip of the Day column.)

Quote:
Not sure that I need A/D, D/A converters at the moment, but that might be down to me just not having experimented with them in the past: I'll look into implementiong at leats one of each.

If you don't need them to be fast (there's no need for speed if they're setting or measuring a power-supply voltage for example), you can use I²C ones and add them later with no changes to your computer since you'll already have an I²C interface. The next step up from I²C in speed would be SPI, and you'll already have that too. The fastest would be parallel, typically connected to a VIA port. If 8 bits is enough (as in most applications), you can read or write super fast. For example, the DAC0808 that I use and show at http://wilsonminesco.com/6502primer/potpourri.html#DAC is settled only 150ns (not µs) after you put the next data byte out on the VIA port. Do an STA VIA2PA for example, and it's already there before the next instruction is fetched. (This does not necessarily include the speed of the op amp though.) There's no sample code at the link above because that's all there is to it—one instruction. When you're not using the D/A converter, it can be ignored and the port can be used normally for anything else you want. The MAX520 quad I²C 8-bit DAC is mentioned there, with sample code. For a super-simple 9-level D/A converter, you can use the VIA's SR data output in mode 100, and add an RC filter. For an A/D converter, I've been using the he MAX153 half-flash 8-bit A/D converter with internal track-and-hold. It's almost fast enough to just read as a memory location, but I go through a VIA port. The circuit is at http://wilsonminesco.com/6502primer/potpourri.html#ADC and has sample code which is very simple. If you're not using the A/D, again the port can be used normally for anything else as long as you don't enable the A/D's outputs to the port.

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What's an additional VIA among friends, anyhow?


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 Post subject: Re: 65C02GPD v2
PostPosted: Wed Jan 13, 2016 7:02 pm 
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cbscpe wrote:
What are the requirements of the video in respect of colors and resolution? For simple text displays I use dual port RAM, large DP RAM are normally only available in packages with very low pitch, 0.5mm.

I'm not too fussed about resolution and even getting black and white would be great.
Ideally, though, I'd like 320x200 with 8 colours. Or the teletext type SA5050 if I can manage it.


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 Post subject: Re: 65C02GPD v2
PostPosted: Thu Jan 14, 2016 5:50 am 
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banedon wrote:
With regard to timers: As I might be swapping different speed oscillators in and out it means that timing will also vary. If I have an external timer than that shouldn't be a problem.

If you use one of the NXP dual UARTs you get a high resolution counter/timer (C/T) as part of the bargain. The C/T runs at a selectable submultiple of the BRG clock frequency (3.6864 MHz), making it completely independent of the Ø2 frequency. NXP's SC28C94 quad UART has two C/Ts, each of which is independent of the other.

I use the C/T in the DUART in POC to generate a 100 Hz jiffy IRQ that is the timekeeping source for the system. It's very stable and, of course, unaffected by changes in Ø2.


Attachments:
File comment: NXP SC28C94 Quad UART
uart_quad_28C94.pdf [231.41 KiB]
Downloaded 77 times

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 Post subject: Re: 65C02GPD v2
PostPosted: Thu Jan 14, 2016 1:18 pm 
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BigDumbDinosaur wrote:
If you use one of the NXP dual UARTs you get a high resolution counter/timer (C/T) as part of the bargain. The C/T runs at a selectable submultiple of the BRG clock frequency (3.6864 MHz), making it completely independent of the Ø2 frequency. NXP's SC28C94 quad UART has two C/Ts, each of which is independent of the other.


Yes, a great suggestion. I was somewhat annoyed that the SC16C654, used on my board, lacks a timer. Luckily I have plenty of other timers to choose from.

There's also the RTC. The DS1307, a common or garden I2C RTC, has an output pin that can be configured to generate a 1Hz, 4Khz, 8Khz or 32Khz square wave. Other RTCs might have more frequencies available.

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 Post subject: Re: 65C02GPD v2
PostPosted: Thu Jan 14, 2016 4:21 pm 
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Aslak3 wrote:
There's also the RTC. The DS1307, a common or garden I2C RTC, has an output pin that can be configured to generate a 1Hz, 4Khz, 8Khz or 32Khz square wave. Other RTCs might have more frequencies available.

Before relying on that periodic output as an accurate time base you might want to verify that those frequencies are what they seem to be. You may be in for a surprise.

In any case, a 1 KHz jiffy IRQ rate is kind of high for most applications. The more frequent the interrupts, the slower foreground programs will run. UNIX has traditionally used a 100 Hz jiffy IRQ and current versions of Linux are using 250 Hz, if memory correctly serves me.

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 Post subject: Re: 65C02GPD v2
PostPosted: Thu Jan 14, 2016 4:53 pm 
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Linux used 100Hz in the past, now you can choose between 100Hz, 1000Hz, or 250Hz when you build your kernel. I don't remember what's standard for pre-built distro kernels, but I think the recommendation is 1000Hz for desktops and 250Hz for servers. In any case, 100Hz served the Unix world well for a long time and is still an ok choice.


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 Post subject: Re: 65C02GPD v2
PostPosted: Sat Jan 16, 2016 8:06 pm 
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BigDumbDinosaur wrote:
Before relying on that periodic output as an accurate time base you might want to verify that those frequencies are what they seem to be. You may be in for a surprise.


Very useful, thanks. I imagine those 32KHz, ... , 1Khz square waves are actually 32.768Khz, ... , 1024Hz, etc. It's a shame the datasheet isn't accurate.

Quote:
In any case, a 1 KHz jiffy IRQ rate is kind of high for most applications. The more frequent the interrupts, the slower foreground programs will run. UNIX has traditionally used a 100 Hz jiffy IRQ and current versions of Linux are using 250 Hz, if memory correctly serves me.


Yes, hence I mentioned that other RTCs might have different clock rates. I doubt you'll find one with a nice "decimal fraction" though, since all RTCs I've come across use a 32.768KHz crystal. Another option, which the OP could use depending on the rest of his system, would be to use the frame interrupt from the video generator to create a jiffy interrupt.

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 Post subject: Re: 65C02GPD v2
PostPosted: Sat Jan 16, 2016 8:16 pm 
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Aslak3 wrote:
BigDumbDinosaur wrote:
Before relying on that periodic output as an accurate time base you might want to verify that those frequencies are what they seem to be. You may be in for a surprise.

Very useful, thanks. I imagine those 32KHz, ... , 1Khz square waves are actually 32.768Khz, ... , 1024Hz, etc.

Correct. Maxim uses a 32,768 Hz crystal in their timekeepers. Hence the 1 KHz square wave will be 1024 Hz and a 100 Hz interrupt from the watchdog will be a bit more frequent than 100 times per second.

Quote:
It's a shame the datasheet isn't accurate.

One thing I quickly got used to years ago when I started using Dallas Semiconductor devices was reading between the data sheet lines. Dallas' parts were high quality, but their data sheets were as notable for what they left out as what was written. :lol: Lots of experimenting proved to be necessary in some cases.

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 Post subject: Re: 65C02GPD v2
PostPosted: Sun Jan 17, 2016 9:57 am 
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Even if the actual frequency of the interrupt is 128Hz and not 100Hz it still can be used, you just need to take that into account, or am I wrong on this?


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