I would like to have more ram in my sbc computers, so i can do some recording that could take lots of ram and other stuff too. I've talked to Garth about getting some 4mb sram module, but they aren't cheap, so i am looking into other options too. I am posting this mainly because i am planning to upgrade my 68k sbc with the 68020 and add some more ram, and because i could add an extra board to my 6502.
So my question is what would it take to interface some old SIMM dram, or sdr/ddr ram into a system that contains a 6502/68k cpu. What controller should be used?
You can assume that the cpu clock won't be faster than 16MHz.

You will need 5V, right? SRAM has some nice advantages but does get expensive when you get above a few megabytes of memory.

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The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

DRAM, for whatever reason, despite reading up on it time and time again, baffles me. How the refresh works. I understand the concept, just not the mechanics. I know the Z80 has built in refresh support, but, still.

I guess you need to have a circuit that either sneaks in, or steals cycles, or something, and tickles all of the address pins? Does it just have to tickle each bit, i.e. if the RAM has 10 address lines, just tickle the 10 lines? all of the bits? every 1024 bits?

Nope, never quite groked DRAM.

It's not that complicated. Imagine a square full of transistors, each holding a small charge. There could be 4096 x 4096 of them. When you perform a read, you select a 4096 bit row, and all the bits will be read out, amplified, and stored in a 4096 bit buffer. From this buffer, you can read column bytes, or you can perform changes. After you're done with that row, the 4096 bits are written back to the 4096x4096 storage, and the charge will be refreshed. Any row you don't read for a while, will lose its charge, so basically all you need to do is make sure you access each of the 4096 rows before that happens. The datasheet will tell you how many rows there are, and what address pins are used for them.

What about dram controllers?

Looking at the google results for DRAM controller CPLD it looks like a CPLD should be able to do it.

Understatement of the century. To fully populate a 65816 running at 14MHz with the largest and fastest SRAM from Cypress will cost about $192 ($6.00 x 32 modules). Contrast to the Raspberry Pi, which thanks to clever business decisions to use "trailing edge technology", can get 16 times that amount (Model A) for 1/8 of the price! I expect that to run a Unix such as NetBSD, Fuzix, or MINIX, even on a hobbyist design, will require at least 4MB (this is the minimum required for NetBSD x86 anyway- though I've gotten an i486 kernel to run in < 2MB).

Unfortunately, for designs that require a lot of RAM, such as a multitasking OS/Unix, old SIMMs/DRAM might be the way to go. Aren't the oldest SIMMs just 41xx series DRAM stuck on a chip with an optimized pinout? Old IBM PCs got away with using discrete components for DRAM Refresh frequently- older PCs/XTs used the DMA controller, and ATs had a dedicated refresh circuit (will update when I figure out how it works). At the cost of 128 interrupts every 2 milliseconds (64kHz), a fast 65816 might be able to do RAM refresh solely using interrupts.

Just something to think about.

I think the effort to build a dynamic RAM controller depends a lot on the speed you want to achieve. Also there are dynamic RAM with built in refresh counters, you only need to tell them "now you can perform the next refresh cycle" and it will internally take the next to the previous one. You just cannot perform any read or write during this cycle. You could probably make a logic that tells the DRAM to perform a refresh cycle when PHI2 is low and do the read/write when PHI2 is high. One point with dynamic RAM is that they have a multiplexed address bus, so you would need to have a demultiplexor. The biggest obstacle however will be, there are no 5V DRAMs anymore.

Let's call it what it is: The biggest obstacle is finding SIMM sockets. 30-pin and 72-pin SIMMs should still be available on the used market, after all.

http://forum.6502.org/viewtopic.php?f=4&t=2989&start=15
I have done to TTL 74lsxx simm 1MB and 16MB on Simm72.
And it works fine.

The latest JAMECO catalog lists a 30 pin SIMM socket on page 13, part number 100302.

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André Fachat wrote up his notes with Bil Herd here, regarding implementing DRAMs.
http://6502.org/users/andre/icaphw/design.html#dram

Just a newbie, so disregard if I have nothing worthwhile to add. I was shopping digikey for RAMs, to see what kinds and types and voltages and sizes and volatilities and fundamental technologies/organizing principles exist, and I ran across "Pseudo-SRAM". Its a DRAM, with an automatic refresh. I think the bus is still multiplexed, though? I dunno? I might be mixing it up with "Page-RAM"; but they might be the same thing. ISSI was the manufacturer.