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PostPosted: Wed Dec 16, 2015 5:14 pm 
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Hello, all. It's been mentioned elsewhere that the inputs of WDC CPU's do not accept TTL voltage levels, but in this regard I'm not confident that the datasheets are both up-to-date and are clearly readable. Allow me to raise a few questions, and I will be grateful for any comments.

Here's a screen capture from the pdf '816 datasheet. The figures on the right are rather a jumble, and I've straightened them out as best I can. This is shown in color in the lower part of the image. Note: Vdd is nominal 5V for all these examples; I omitted the remainder of the table. Also, I added the little diode symbols as a visual cue. That's because vih max and vil min are irrelevant, basically just telling us that input protection diodes are present.
Attachment:
WDC 65c816 input logic levels.png
WDC 65c816 input logic levels.png [ 35.52 KiB | Viewed 683 times ]

What I get from the above is that, for '816, all inputs share a common spec. But, after de-jumbling, the 'c02 datasheet (below) seems to imply that the 'c02 spec for BE, D0-D7, RDY and SOB differs from the 'c02 spec for IRQB, NMIB, PHI2 and RESB -- the latter group requires virtually rail-to-rail voltage swings (red asterisks).

(Less noteworthy is the fact that BE etc are spec'd at 30%-70% for 'C02, contrasting slightly with 20%-80% for '816.)

Attachment:
WDC 65c02  nmi-irq logic levels.png
WDC 65c02 nmi-irq logic levels.png [ 36.41 KiB | Viewed 680 times ]

My questions:
  • does my de-jumbling seem correct?
  • is it plausible that modern c02's and 816's do actually differ as indicated?

Re the 2nd question: Errors are hardly unknown in WDC doc. :roll: Also, even if the info was true at the time of publication, hasn't WDC switched to a different foundry? I'm not clear on the date that happened. Is it reasonable to suppose that specs such as these might be affected by the foundry switch? Frankly, I don't trust any of this material !! Thoughts, anyone? :)

Thanks,
Jeff

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PostPosted: Wed Dec 16, 2015 6:14 pm 
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It seems possible that WDC have four input pins which are particularly demanding of almost full rail swing inputs. But it doesn't seem very convenient, or very well signposted! Could it be for noise rejection - not that these pins are necessarily Schmidt inputs with hysteresis, but they are pins where the machine could be sensitive to stray wiggles acting like edges.

BTW, with your diode annotation, isn't the point more that the diode is there for protection and will burn out or degrade if you demand it dissipates significant power?


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PostPosted: Wed Dec 16, 2015 7:41 pm 
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Yes, WDC did switch foundries , but never did clarify what, if anything, that might have done vis a vis device performance.

I seem to recall we had another topic going at one time about what constituted acceptable input levels to the 'C02 and '816. I had brought up the fact that the ISSI static RAM I am using in POC V1.1 generates what are essentially TTL levels (minimum Voh, for example, is 2.4), yet works flawlessly with the 65C816. If the SRAM's Voh fell into the "no man's land" of the 65C816's switching characteristic I would expect either a DOA unit or marked instability—neither of which has occurred.

Dr Jefyll wrote:
Frankly, I don't trust any of this material !!

I hear yuh! Some of the info almost seems to contradict actual behavior. Trouble is, if WDC won't clean up the data sheet, who will?

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PostPosted: Wed Dec 16, 2015 8:49 pm 
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BigEd wrote:
BTW, with your diode annotation [...]
Sorry, Ed, if I threw you off the scent. In normal circumstances the diodes don't conduct and might as well not exist. So, I intended the diode symbols to be simply a reminder that, "These particular figures don't pertain to the discussion." I only want to examine the simple case of a gate that drives a CPU input -- what is the voltage threshold?

Clearly there are lots of scenarios where the threshold matters, but the one that triggered my interest today is the "ghost interrupt" threat that's present when the CPU's /IRQ or /NMI input is driven by laggardly, open-drain (aka open-collector) logic. Garth discusses this on his web site, about 20% of the way down this page.
Attachment:
figure_2.gif
figure_2.gif [ 28.98 KiB | Viewed 664 times ]
As shown, the waveform for Actual Virq is, unfortunately, an RC curve. What we really want is to pass the logic-low to logic-high threshold sooner rather than later. There are two ways to cross the threshold sooner:
  • change the RC (use a lower-value resistor, or reduce capacitance), or
  • change the threshold

Two implications come to mind.
  • A person could get bitten (haunted?) by the ghost interrupt merely by replacing a non-WDC CPU with a WDC CPU, :shock: and
  • in the general case (not just CPU/IRQ), open-collector logic operates more slowly when the input of the device being driven uses CMOS rather TTL levels. Speed can be improved by interposing a 74HCT-series buffer between the open-collector node and the device being driven. This can be considered an additional precaution regarding the ghost-interrupt hazard. (Garth explains how proper coding can allow much more time for the open-collector logic to react.)

BTW, here's an excerpt from WDC's datasheet for their 65c22 VIA's. The "S" version wants 20%-80% of VDD but the "N" version accepts TTL input levels (and also has the traditional open-drain /IRQ output).
Attachment:
WDC VIA input logic levels.png
WDC VIA input logic levels.png [ 28.31 KiB | Viewed 664 times ]


BigDumbDinosaur wrote:
I had brought up the fact that the ISSI static RAM I am using in POC V1.1 generates what are essentially TTL levels
Yes, there are several threads relating to this, including the following (not necessarily a complete list). If we manage to shed any light on the matter then it would make sense if these threads linked got back to here.

WDC 65c02 signal levels
WDC MPU TTL Compatibility
WDC 65c02 signal levels
UM6502, MOS, TTL/CMOS difference

-- Jeff

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https://laughtonelectronics.com/Arcana/ ... mmary.html


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