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At the moment I'm building some bug robots out of 74xx ICs to teach myself basic circuit design.
Sounds interesting. You happen to have any pictures of your creations ?
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Right now my CPU ideas might be a lot of vaporware, since I'm completely self taught,
but I'll throw them out there...
I'm also completely self taught, also because what you could learn at school is just a starting point...
and probably not very helpflul when it comes to _implemeting_ your design.
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I've been wanting to make a homebrew cpu out of discrete logic for some time now.
I've read that the cray 1 was made completely out of ECL NOR gate ICs, and it ran at 80 MHz,
so I think it's safe to say that's near the upper limit for homebrew cpu speed.
At >30 MHz, routing/distributing the signals while keeping signal integrity becomes an interesting topic.
The fastest TTL contraption I ever had built was a 12 Bit pulse width modulator based on 74F163,
clocked with 80MHz... but the "ripple carry" inside those 74F163s turned out to be too slow...
BTW: nowaday, it's a bit difficult to get hands on ECL ICs, and they might be a bit expensive.
Would suggest that you try 74AC\74ACT...
but some years ago, another hobbyist had warned me that 74AC\74ACT outputs can damage
74LS or ROM inputs after 6 months of operation or such.
This is because of the energy within the fast rise/fall times of the output signals,
so inserting a resistor at a 74AC\74ACT output might become a topic...
But that's all implementation specific, we would have to take care about such things later.
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One of my favorite topics is computer security, so naturally that's one of the goals too XD.
Nice to hear that... but on the practical level, computer security might be just a myth.
...unless you do realtime encryption\decryption at hardware level during the CPU read/write cycles,
and use different keys and algorithms for program memory and data memory...
...and different keys and algorithms for different tasks\threads, too.
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I don't have even a high-level description of the CPU yet, but some ideas I've been throwing
around are:
1: Asynchronous logic. I've been reading up on null-convention logic,
which claims to be completely combinatorial. I'm not sure if that's completely true or not,
but here's a link to a pdf from UCSC
NCL.pdf.
IMO asynchronous logic would solve a lot of the problems with routing delays even with high-speed
designs, hopefully...
Don't have any experience with asynchronous logic, because synchronous logic already provided
enough problems to me so far.
Just two links you might find interesting:
Asynchronous TTL CPU from Hans Summers, which never was builtAn attempt of building something like an asynchronous 6502Quote:
2: EPROMs/SRAM. Instead of wiring together hundreds of discrete ttl ICs
(or even worse, coding a processor on an FPGA
), what about using an EPROM/EEPROM/RAM IC
to simulate combinatorial logic?
This thread talks a bit about it.
Personally I like the RAM idea the most... from a security standpoint, you can't get much more
secure than a computer that self-destructs every reboot. XD
Something like this
ALU built with EPROMS ?
In theory, you could use 10ns RAMs for building your own FPGA.
Would feel a little bit like cheating to some guys, of course.
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3: TTA. Instead of microcode or some other sort of finite state machine telling the processor
where to move what data, the processor could just execute
one move instruction,
with a memory-mapped ALU. An add operation, for example, might look like
Code:
mov a, add1
mov b, add2
mov aluout, a
This should
in theory combine the simplicity of RISC with the speed of VLIW.
It also goes pretty well with the EEPROM/RAM idea, and upgrades might be easier since
all you'll need to do to add a new instruction is set aside another memory slot.
There's more info on
the wiki page.
TTA has its advantages and disadvantages...
I think it certainly has the potential to keep a CPU core more modular/"scalable"...
on the other hand, you are going to need _fast_ bus systems...
and the control unit needs to keep track of which of the data went were etc.
I'm now starting to remember the 80537 microcontroller (Siemens).
One of the peripheral function blocks was called MDU (multiply divide unit).
Sort of a "primitive coprocessor for integer", supporting 16*16 Bit multiply,
32/16 Bit divide, shifting multiple Bit positions, mantissa normalising etc.
The sequence in which the MDU registers were written triggered a specific operation.
Of course, writing/reading the MDU registers by the CPU took longer than a MDU operation itself.
80537 is obsolete by now, and it's hard to find any documentation.
But the Infineon C500 family of microcontrollers also has a MDU...
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Anyway, to answer your question, it might simulate a 6502 since it's hopefully
going to be turing-complete, and the entire 6502 instruction set will probably
have equivalents memory-mapped somewhere... but no, it's not a 6502.
Well, actually... this place here is a 6502 forum...
actually, it's _THE_ 6502 forum.
Naturally, having a feature for at least emulating the 6502 instruction set somehow
might increase the chance of getting feedback about your project from the community.
Looking forward to continue some of this discussion per PM, if possible...
Cheers,
Dieter.