BigDumbDinosaur wrote:
It is a job best suited for one of those devices. Aside from the consolidation of a lot of logic into one device, any reasonably good MMU scheme using discrete hardware is going to be slow and bulky. Your design is using 74HC hardware, which is no faster than 74LS. Readily available CPLDs and FPGAs are usually 10ns pin-to-pin or faster.
The only delay of any real consequence in my design is that of the HC670 -- which is according to the datasheet has a propagation delay which is typically under 15 nS. Good enough for me. The GAL is available with a pin-to-pin delay as low as 5 nS, though it would not be a limiting factor in this scheme.
BigDumbDinosaur wrote:
In any case, if the idea is to create a protected execution environment there will be much more to it than giving programs a nice, warm place to sleep. In that respect, the '816 has a sizable advantage over the 65C02. This is not to say that it can't be done with the 65C02, only that you will be moving mountains to plant a tomato garden.
I think we had this discussion before with regard go implementing a UART on a PIC. I can't say that I'm unhappy with my results.
In any event, the purpose for this MMU is not just for a 6502, it is for other 8-bit CPUs with a 16-bit address bus like the 6309/6809 as well. The above MMU is also capable of providing a protected execution environment. Since all chip selects in the system are derived from physical addresses the mapping can be arranged by the O.S. so that only task 0 will have access to hardware devices. Task 0 will be the supervisor process.
While there is much to be said for working with FPGAs, I'm not trying to build a product here so I'm not concerned with making the best use of available technology in terms of performance, cost, or efficiency. Instead, I'd like to build something simple and understandable. You know, like the 6502 itself. Something that doesn't require sophisticated tools with steep learning curves to master, something that can be used to assemble a working computer on a breadboard over a course of a few evenings in order to learn and play with concepts. The GAL is a bit of a quandary, but it can be replaced with discrete logic chips if desired.