cbscpe wrote:
If you use 15ns GALs then you could look for Quarter Power GALs they are quite efficient and consume only 55mA worst case.
I can only find the quiet GALS in 20ns, so I figured I'd start with the 15ns units. Both use too much power for battery operation AFAIAC.
cbscpe wrote:
I really doubt that the performance impact of many wait states for the IO register data cycle is relevant to the overall system performance. I'd really want to measure that and compare it to a solution that uses a 65C22 as interface between the 6502 bus and the AVR and needs to poll for ready. On the other hand I still have this idea in mind to convert Daryls SPI using Xilinx 95xx to an ATF1504AS. That would be definitively the fastest solution.
Given that the SPI clock can run quite fast (up to 8MHz in the case of PIC-SPI), I think if you add up the AVR interrupt latency, plus the time required to service the interrupt, that you're talking about a lot of wait states at 14 MHz 6502 clock rate. I'll wager that your maximum transfer rate will be less than half of what the PIC-SPI can do, even with the faster AVR instruction time. Additionally, you'll completely lose your 6502 during maximum-speed transfers as the bus will be 100% utilized during that time.
You'd probably be better off making some kind of DMA engine with the AVR to transfer from memory to the SPI device directly. I may go in that direction once I've got a basic PIC-SPI running. In any event, the wait states involved in setting up the DMA transfer won't hurt nearly as much in this case.
I haven't looked into it myself, but it's possible that a Cypress PSoC may offer a the best solution. They run natively at up to 5V and have a limited amount of programmable logic on them which is connected to an 80 MHz ARM Cortex M0. I think it should be possible to set something up equivalent to the Microchip PMP peripheral and then implement your own I/O device without any great effort. You will have the best of both worlds at your disposal -- programmable logic and microcontrollers.