6502.org Forum  Projects  Code  Documents  Tools  Forum
It is currently Fri Nov 08, 2024 10:40 pm

All times are UTC




Post new topic Reply to topic  [ 135 posts ]  Go to page 1, 2, 3, 4, 5 ... 9  Next
Author Message
 Post subject: Star Ground
PostPosted: Sat Nov 14, 2015 7:31 pm 
Offline
User avatar

Joined: Sun Sep 08, 2013 10:24 am
Posts: 740
Location: A missile silo somewhere under southern England
I've asked about this previously and have set up a star ground and power using wire wrap. However, I'm now working on my first PCB based 65C02 design and want to be absolutely sure of how to implement this using a 4 layer board.

The PCB is going to be layered thus:

Top layer - signals
2nd layer - GND plane
3rd layer - Power/+5V plane
Bottom layer - signals

To make the power and GND planes into star one would I then divide those planes into sections something along the lines of this? The brown lines represent breaks in the copper.

Attachment:
star ground example.jpg
star ground example.jpg [ 47.11 KiB | Viewed 1498 times ]


[edit]

Here's an example of what I'm thinking.
Please ignore everything apart from the placement of the major ICs (the rest is not finalised and not routed properly (or not routed at all).
The dark-cyan background represents the GND plane and the red outlined tracks are being used to divide that plane into sections.

Is this correct? I think it is, but as getting a 4 layer board manufactured is going to be expensive I'd like to get this right :).


Attachments:
star ground example2.jpg
star ground example2.jpg [ 666.02 KiB | Viewed 1494 times ]
Top
 Profile  
Reply with quote  
 Post subject: Re: Star Ground
PostPosted: Sat Nov 14, 2015 8:52 pm 
Offline
User avatar

Joined: Thu May 28, 2009 9:46 pm
Posts: 8476
Location: Midwestern USA
banedon wrote:
I've asked about this previously and have set up a star ground and power using wire wrap. However, I'm now working on my first PCB based 65C02 design and want to be absolutely sure of how to implement this using a 4 layer board.

The PCB is going to be layered thus:

Top layer - signals
2nd layer - GND plane
3rd layer - Power/+5V plane
Bottom layer - signals

To make the power and GND planes into star one would I then divide those planes into sections something along the lines of this? The brown lines represent breaks in the copper.

My opinion is that such an arrangement has no value and may actually give rise to some issues.

The value of the inner layers as power and ground planes is that they are essentially uninterrupted. Hence the ESR of these layers is vanishingly small, which means that ground bounce and local Vcc fluctuations are largely eliminated. Also, the combination of the two layers acts like a sizable bypass capacitor, which can do quite a bit in keeping circuit noise to a minimum.

In my POC units, I did nothing to change the topology of the inner layers. Here's what the ground layer looks like in EPCB:

Attachment:
File comment: POC V1.1 Ground PLane
ground_plane.gif
ground_plane.gif [ 63.53 KiB | Viewed 1489 times ]

Other than where holes and via pass through, there are no interruptions. This circuit is dead quiet.

Attachment:
File comment: Power Distribution to Chip
vcc_distribution.gif
vcc_distribution.gif [ 38.04 KiB | Viewed 1489 times ]

The above shows how I bring Vcc to devices. The theory is that any noise that is emitted out of the Vcc pin by the device is seen by the device's bypass capacitor before it gets to the inner power plane. The connection between device and capacitor is short and thick, which reduces the ESR to essentially zero. This practice is based upon recommendations by Dr. Howard Johnson, generally acknowledged to be the guru on this sort of stuff.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!


Top
 Profile  
Reply with quote  
 Post subject: Re: Star Ground
PostPosted: Sat Nov 14, 2015 8:59 pm 
Offline
User avatar

Joined: Thu Dec 11, 2008 1:28 pm
Posts: 10975
Location: England
So, is the message something like this:
- daisy-chaining all your devices in one long string is worst
- star connection is better
- thick wires are better than thin ones
- planes are best if you have the layers
- if you can only afford one plane, make it a ground plane
- whatever you do, have a bypass capacitor rather near each device's power pin and another bigger one where the power comes to the board.


Top
 Profile  
Reply with quote  
 Post subject: Re: Star Ground
PostPosted: Sat Nov 14, 2015 9:18 pm 
Offline
User avatar

Joined: Sun Sep 08, 2013 10:24 am
Posts: 740
Location: A missile silo somewhere under southern England
Okey dokey. I thought that splitting them up would isolate high noise devices from each other to a degree, but I'll certainly be guided by you on this.

[edit]

One thing to note: Eagle does not seem to lend itself to connecting the VCC/VDD pin of an IC to the bypass cap which is connected to VCC - it just auto routes the IC pin to VCC. I have to detach the pin from VCC in the schematic and then manually connect the pin to the bypass cap in the layout editor. Anyone else getting this who use Eagle?


Top
 Profile  
Reply with quote  
 Post subject: Re: Star Ground
PostPosted: Sat Nov 14, 2015 9:53 pm 
Offline
User avatar

Joined: Tue Nov 16, 2010 8:00 am
Posts: 2353
Location: Gouda, The Netherlands
Quote:
if you can only afford one plane, make it a ground plane

And if you can only afford two planes, make it two ground planes. It is important to keep impedance on ground connections low, but impedance in power supply lines isn't bad, as long as you have sufficient bypass caps near the chip. Even on four layer boards, I usually make 3 ground planes, and one power plane, although the power plane is mostly for convenience.


Top
 Profile  
Reply with quote  
 Post subject: Re: Star Ground
PostPosted: Sat Nov 14, 2015 9:54 pm 
Offline
User avatar

Joined: Tue Nov 16, 2010 8:00 am
Posts: 2353
Location: Gouda, The Netherlands
Quote:
One thing to note: Eagle does not seem to lend itself to connecting the VCC/VDD pin of an IC to the bypass cap which is connected to VCC - it just auto routes the IC pin to VCC

As long as the cap is close, it doesn't matter that the IC is also connected to VCC.


Top
 Profile  
Reply with quote  
 Post subject: Re: Star Ground
PostPosted: Sat Nov 14, 2015 10:11 pm 
Offline
User avatar

Joined: Sun Sep 08, 2013 10:24 am
Posts: 740
Location: A missile silo somewhere under southern England
Arlet wrote:
Quote:
One thing to note: Eagle does not seem to lend itself to connecting the VCC/VDD pin of an IC to the bypass cap which is connected to VCC - it just auto routes the IC pin to VCC

As long as the cap is close, it doesn't matter that the IC is also connected to VCC.

That's what I initially thought, but a lot of people are suggesting that it's best to route a short, thick track from the IC VDD pin to the bypass cap and have the bypass cap connected to the VDD layer.


Top
 Profile  
Reply with quote  
 Post subject: Re: Star Ground
PostPosted: Sun Nov 15, 2015 12:54 am 
Offline
User avatar

Joined: Fri Aug 30, 2002 1:09 am
Posts: 8538
Location: Southern California
The star, or preferably, a spider web, ie, start with a star and then add the wires going around connecting neighboring ICs together at their ground pins and power pins, is for wire wrap, or even for PC boards that don't have a ground plane, if you can "sew" it in. If you do have a ground plane, do not cut it into star branches. A major part of the reason for having the ground plane is to make every signal line a transmission line rather than an antenna. The signal's return current flows through the ground plane, but it does not take the shortest possible route. Instead, because of mutual inductance, it runs immediately under the trace, taking the shape of the trace. If you cut the ground plane, you ruin that. There are times that it is appropriate to do the chainsaw cuts and isolate planes; but then any two sections should be brought together in only one place, and you put a bypass capacitor right at that place, and bring all the signals through as close as possible to that place, so you don't have them running over the cut. In my commercial designs, I frequently have planes split into sections to keep digital noise and switching power supply noise out of the audio circuits that handle high-quality audio for music. It works very well if you do it right.

banedon wrote:
One thing to note: Eagle does not seem to lend itself to connecting the VCC/VDD pin of an IC to the bypass cap which is connected to VCC - it just auto routes the IC pin to VCC. I have to detach the pin from VCC in the schematic and then manually connect the pin to the bypass cap in the layout editor. Anyone else getting this who use Eagle?

If it outputs gerber files, there's a ton of things you can fix up in the files rather easily by hand with a text editor if you know the gerber 274X standard. It will involve using extra layers in the CAD that will get merged in the files and result in one file per layer. You can for example turn the polarity of your lines or pads negative with the %LPC*% instruction (for "layer polarity clear") and draw where you want to cut a channel through a plane, then turn it back positive with the %LPD*% (for "layer polarity dark") and put a trace in that channel. This way you can have a pin go first to its bypass capacitor and then to the Vcc plane, if it mattered. I've done this many, many times. I have kind of a template file I use to guide me through the process so I don't have to figure it out every time, and it goes pretty quickly.

Arlet wrote:
Quote:
if you can only afford one plane, make it a ground plane

And if you can only afford two planes, make it two ground planes. It is important to keep impedance on ground connections low, but impedance in power supply lines isn't bad, as long as you have sufficient bypass caps near the chip. Even on four layer boards, I usually make 3 ground planes, and one power plane, although the power plane is mostly for convenience.

I would say do a ground plane and a power plane. Although I have not been able to find it again, I'm sure I read from Dr. Howard Johnson (the industry digital-design guru) that an infinite plane has no inductance between two points. We can't do an infinite plane of course, but keeping parts a little ways from the edge is a close-enough approximation. Or perhaps what he said was that pair of infinite parallel planes, like a ground plane and a power plane, have no inductance. (In that case, there's no need for bypass capacitors close to every IC.) Either way, a ground plane won't need any help from a second one. The exception is when you have high-impedance, low-frequency signals (like audio), where capacitance between layers not separated by a plane causes crosstalk, even if they are sandwiched between plane layers. In that case I have needed extra planes between them; but that's a different situation from looking for best performance in fast digital. I did say "planes," not "ground planes," because a power plane that is bypassed to ground at the right places looks like a ground plane to AC signals anyway.

I like to make the design the best I can especially if it doesn't cost extra; but some of this is not very critical for 4x6" (and smaller) boards at the speeds we're dealing with here, especially if you're going to use DIPs which are already kind of a limiting factor in high-speed performance.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?


Top
 Profile  
Reply with quote  
 Post subject: Re: Star Ground
PostPosted: Sun Nov 15, 2015 6:14 am 
Offline
User avatar

Joined: Tue Nov 16, 2010 8:00 am
Posts: 2353
Location: Gouda, The Netherlands
Quote:
Either way, a ground plane won't need any help from a second one.

A perfect ground plane won't need any help. But on real boards, the ground planes aren't perfect. Two imperfect ones are better than one.
Quote:
a lot of people are suggesting that it's best to route a short, thick track from the IC VDD pin to the bypass cap and have the bypass cap connected to the VDD layer.

Currents follow path of least impedance. Offer multiple paths, and let the currents figure it out.


Top
 Profile  
Reply with quote  
 Post subject: Re: Star Ground
PostPosted: Sun Nov 15, 2015 2:54 pm 
Offline
User avatar

Joined: Sun Sep 08, 2013 10:24 am
Posts: 740
Location: A missile silo somewhere under southern England
Is there a problem with running one track on top of another, non-interference?
I.e. on different layers.

[edit]
Gah routing buses is a nightmare! lol. I'm having to eat into the power plane a little to do it.


Last edited by banedon on Sun Nov 15, 2015 3:10 pm, edited 1 time in total.

Top
 Profile  
Reply with quote  
 Post subject: Re: Star Ground
PostPosted: Sun Nov 15, 2015 3:05 pm 
Offline
User avatar

Joined: Tue Nov 16, 2010 8:00 am
Posts: 2353
Location: Gouda, The Netherlands
Two tracks running parallel will have some cross talk, both capacitive and inductive. The amount of cross talk depends on the distance (less distance = more cross talk), and length of the parallel section (longer = more), the material between, and the rise/fall times of the signal (shorter = more)

When two signals that change at the same time (e.g. two data lines from a bus), cross talk usually isn't a problem, because we're not interested in the signals when they are changing, only when they are stable.

In other cases, it could be a potential problem, for instance when running I2C signals right next to address bus, but it all depends on all the parameters above.


Top
 Profile  
Reply with quote  
 Post subject: Re: Star Ground
PostPosted: Mon Nov 16, 2015 7:06 pm 
Offline

Joined: Mon Aug 05, 2013 10:43 pm
Posts: 258
Location: Southampton, UK
BigDumbDinosaur wrote:
In my POC units, I did nothing to change the topology of the inner layers. Here's what the ground layer looks like in EPCB:

...

Other than where holes and via pass through, there are no interruptions. This circuit is dead quiet.

...

The above shows how I bring Vcc to devices. The theory is that any noise that is emitted out of the Vcc pin by the device is seen by the device's bypass capacitor before it gets to the inner power plane. The connection between device and capacitor is short and thick, which reduces the ESR to essentially zero...


This is interesting, BDD. Did you refine your PCB from what is on your website?

At .... http://sbc.bcstechnology.net/images/sbc_pcb_org.jpeg ... there are traces to both sides of the caps, with the IC power pins connected to the planes.

Which way do you think is best? I have done a little reading and it seems everyone has their own opinion with this kind of 4 layer design. Somewhere I read suggests no traces at all were necessary, and the cap should simply be placed near to the IC. This does not seem right to me but then I am a complete amateur.

The frustrating thing for me, finishing off a very similar 4 layer design, is that KiCAD does not make these kinds of arrangements easy, since it wants to tie the lead (IC or cap) to the plane, directly. :(

_________________
8 bit fun and games: https://www.aslak.net/


Top
 Profile  
Reply with quote  
 Post subject: Re: Star Ground
PostPosted: Mon Nov 16, 2015 7:53 pm 
Offline
User avatar

Joined: Tue Nov 16, 2010 8:00 am
Posts: 2353
Location: Gouda, The Netherlands
Quote:
The frustrating thing for me, finishing off a very similar 4 layer design, is that KiCAD does not make these kinds of arrangements easy, since it wants to tie the lead (IC or cap) to the plane, directly.

At the frequencies and distances we're talking about, there's not going to be any difference, so don't waste energy fighting the tools about this issue. I've made double sided boards that run at 100 MHz. Brad is doing 25+ MHz on breadboards. On a 4 layer board, with one empty ground plane, and caps near VCC pins, it's hard to make it fail.


Top
 Profile  
Reply with quote  
 Post subject: Re: Star Ground
PostPosted: Tue Nov 17, 2015 12:13 am 
Offline
User avatar

Joined: Fri Aug 30, 2002 1:09 am
Posts: 8538
Location: Southern California
Aslak3 wrote:
The frustrating thing for me, finishing off a very similar 4 layer design, is that KiCAD does not make these kinds of arrangements easy, since it wants to tie the lead (IC or cap) to the plane, directly. :(

In most cases with digital ICs, it would indeed be best to let the power or ground pin go directly to the plane, not first to a capacitor. There is a time for a version of the latter, but I won't go into that right now.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?


Top
 Profile  
Reply with quote  
 Post subject: Re: Star Ground
PostPosted: Tue Nov 17, 2015 8:16 am 
Offline
User avatar

Joined: Thu May 28, 2009 9:46 pm
Posts: 8476
Location: Midwestern USA
Arlet wrote:
Quote:
One thing to note: Eagle does not seem to lend itself to connecting the VCC/VDD pin of an IC to the bypass cap which is connected to VCC - it just auto routes the IC pin to VCC

As long as the cap is close, it doesn't matter that the IC is also connected to VCC.

Cypress Semiconductor Corp., who makes very high speed static RAM, disagrees with you. Please see this post and read the attached white paper for their opinion, especially page 8 on the topic of power traces.

Aslak3 wrote:
This is interesting, BDD. Did you refine your PCB from what is on your website?

At .... http://sbc.bcstechnology.net/images/sbc_pcb_org.jpeg ... there are traces to both sides of the caps, with the IC power pins connected to the planes.

Yes. The PCB layout on my website is POC V1.0, the very first iteration (the website needs some updating). In POC V1.1, I rearranged power delivery to follow the advice in the above referenced white paper. Also, it wasn't necessary to tie the ground side of the bypass cap back to ground on the device it is decoupling. V1.1 was actually quieter than V1.0 because of these changes.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!


Top
 Profile  
Reply with quote  
Display posts from previous:  Sort by  
Post new topic Reply to topic  [ 135 posts ]  Go to page 1, 2, 3, 4, 5 ... 9  Next

All times are UTC


Who is online

Users browsing this forum: No registered users and 7 guests


You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot post attachments in this forum

Search for:
Jump to: