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 Post subject: Guide to 65C816 Opcodes
PostPosted: Fri Oct 02, 2015 4:25 pm 
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Bruce Clark's long and detailed document about the 65C816 opcode behaviour is now available online - see the Tutorials and Primers section of the site. It's mostly about the native modes, and goes into some detail on the exact behaviour. He called for proofreaders a while ago, and this is the latest corrected version, converted to HTML.

Many thanks to Bruce for the painstaking work! (And if you haven't done so recently, take a look through that Tutorials and Primers page - you might be missing out on something!)

Previously (lightly edited):
dclxvi wrote:
A 65C816 version of the "NMOS 6502 Opcodes" is inevitably going to overlap the 65C816 Programming Manual, so rather than just repeating the material, I took the opportunity to fill in the gaps and address some of the things that come up on the forum from time to time. Things like differences between 8-bit native mode and emulation mode (TXS is one that's not obvious at first blush).

There is a lot more 65(C)02 code than 65C816 code out there, so I wanted to address things that might come up when adapting code for native mode. Adapting to 8-bit native mode before updating routines for 16 bits is one way to do this incrementally.

I also wanted to point out the things that are actually different between the 65(C)02 and emulation mode. For example, JMP ($12FF) get the high byte from $1300 (like the 65C02) but takes 5 cycles (like the NMOS 6502), so it's not exactly like either.

Also, many simulator writers seem to be very interested in replicating absolutely everything -- even things that would never break any code that isn't a unit test. For example, V flag in decimal mode, the fact that the high byte of the LDA ($FF),Y pointer is $0000 not $0100, etc.

Somewhat surprisingly, very few people (even those who are otherwise very knowledgable about the 65C816 and the 6502 family generally) are really all that familiar with when page/bank wrapping does or does not occur. So that seemed like another good gap to fill.

Still, the thrust of the article is native mode. I used many 16-bit examples because 2 bytes allowed me to illustrate when wrapping did and did not occur with a single example.


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PostPosted: Fri Oct 02, 2015 4:44 pm 
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BigEd wrote:
this is the latest corrected version, converted to HTML.
Converted by you, isn't that right, Ed?

Three cheers for you, for Bruce (of course) and for the proofreaders and anyone else who assisted!

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PostPosted: Fri Oct 02, 2015 5:40 pm 
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Thanks Jeff, yes, guilty as charged - me and a fistful of awk.


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PostPosted: Fri Oct 02, 2015 8:57 pm 
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BigEd wrote:
Bruce Clark's long and detailed document about the 65C816 opcode behaviour is now available online - see the Tutorials and Primers section of the site. It's mostly about the native modes, and goes into some detail on the exact behaviour. He called for proofreaders a while ago, and this is the latest corrected version, converted to HTML.

It's a good tutorial, although I had suggested to Bruce to use a different way of describing the registers (e.g., SP for the stack pointer, not S). Most machine language monitors don't use single letters to refer to the "control" registers, such as PC and SP.

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PostPosted: Fri Oct 02, 2015 9:15 pm 
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BigDumbDinosaur wrote:
although I had suggested to Bruce to use a different way of describing the registers (e.g., SP for the stack pointer, not S). Most machine language monitors don't use single letters to refer to the "control" registers, such as PC and SP.

Did machine-language monitors move away from the standard in order to reserve the single letters like S for commands?

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PostPosted: Fri Oct 02, 2015 9:34 pm 
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(I notice the document doesn't start off with an overview of the programmer's model of the machine. Here's a diagram borrowed from the 65816 Programming Primer page (P not shown):

Code:
                           +--------------------------+--------------------------+
                           |       Accumulator (B) (A or C) Accumulator (A)      |
+--------------------------+--------------------------+--------------------------+
| Data Bank Register (DBR) |
+--------------------------+--------------------------+--------------------------+
                           |                 X Index  | Register (X)             |
                           +--------------------------+--------------------------+
                           |                 Y Index  | Register (Y)             |
+--------------------------+--------------------------+--------------------------+
|  0  0  0  0  0  0  0  0  |                   Direct | Page Pointer (D)         |
+--------------------------+--------------------------+--------------------------+
|  0  0  0  0  0  0  0  0  |                   Stack  | Pointer (S)              |
+--------------------------+--------------------------+--------------------------+
|Program Bank Register(PBR)|                  Program | Counter (PC)             |
+--------------------------+--------------------------+--------------------------+


There's a similar diagram in A 6502 Programmer's Introduction to the 65816 by Brett Tabke.
)

(Using S and P is very familiar in mnemonics like TXS and PHP - seems reasonable to me.)


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PostPosted: Fri Oct 02, 2015 10:22 pm 
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GARTHWILSON wrote:
BigDumbDinosaur wrote:
although I had suggested to Bruce to use a different way of describing the registers (e.g., SP for the stack pointer, not S). Most machine language monitors don't use single letters to refer to the "control" registers, such as PC and SP.

Did machine-language monitors move away from the standard in order to reserve the single letters like S for commands?

I don't recall any more. What I do recall is that MOS Technology used two-letter notation for all registers except the accumulator and index registers. The dot notation for those registers was something I recall seeing c. 1977, when I got a set of typewritten developer's docs from MOS. Ever since then, I have used .A, .X and .Y for the "user" registers, PC for the program counter, SP for the stack pointer and SR for the status register. With the 65C816, I continued on that path with DB for the data bank, DP for the direct page pointer and PB for the program bank. The two letter mnemonics are unambiguous (in particular, using K to represent PB is odd, as K could conceivably also mean DB, since both registers store a banK value) .

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PostPosted: Mon Oct 12, 2015 10:10 am 
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Maybe this is me not understanding what is happening, but shouldn't the "DL" in the following snippet be "DH" (my emphasis)?
Quote:
5.9 (DIRECT)

Length: 2 bytes, $OP $LL

(direct) addressing uses a 16-bit pointer. When the e flag is 1 and the DL register is $00 (both conditions must be met), the address of the pointer is:
This would seem to be the case with DIRECT as well. The graphic would seem to suggest DH, too, because of page wrapping in emulation mode.

BTW, trying to figure out page/bank wrapping, and the document is absolutely fantastic. Thanks again!


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PostPosted: Mon Oct 12, 2015 10:37 am 
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I can't test at present, but here's my understanding: I think the doc is right - this is one of the obscure cases. In emulation mode, direct page wraps if it is aligned. In this case it acts like a zero page of a 6502. But if the page is not aligned, then direct page doesn't wrap. In particular, this means that high-bit-set is a negative offset when direct page is aligned, and a larger positive offset when direct page is not aligned. Having direct page located in zero page is a special case of an aligned direct page.

(I believe Bruce did test all his examples on a real 816)


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PostPosted: Mon Oct 12, 2015 11:00 am 
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BigEd wrote:
I think the doc is right - this is one of the obscure cases.
It's not the logic I'm wondering about -- that's my understanding as well. It's the "DL" in the text that I think might be a typo, with "DH" instead? Bank Byte zero, Page ("high", DH) Byte 01, "low" byte what is being changed, and the one byte that wraps. Though this could be my lack of sleep talking.


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PostPosted: Mon Oct 12, 2015 11:08 am 
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It all looks consistent to me, including the example, which has D=$FF00, which is to say DH is FF and DL is 00. That is, a relocated direct page but also a page-aligned direct page.


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PostPosted: Mon Oct 12, 2015 1:12 pm 
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As pointed out in a different thread, the text is right and I am wrong. The good news is I have finally understood what's happening. :? Sorry for the confusion.


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PostPosted: Mon Oct 12, 2015 1:45 pm 
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Always good to end up in agreement! Some of my feedback to Bruce at the proofreading stage was a bit like this - he was right!


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