Yes indeed. I wasn't precluding the symbol from showing pin numbers, just that the symbol should group pins by logical function (databus, addressbus, control signals, clock signals) and not group them by pin position.

(As a little bit of an aside, on a theoretical level I wonder why it is mandatory to include pin numbers on schematics, when the pin name should be the canonical way to identify the connection. It makes sense when the schematic exists only to generate a net list so the schematic can be realised, but, otherwise it does not make understanding a circuit any clearer.)

I also like KiCAD and would recommend it. Though it has it's own quirks and unusual workflow, it seems to be the best of the free options out there.



I rather like linking parts via drawn busses though, and using links which indicate signal direction. I think it makes things clearer. Too many chips isolated with all pins attached to links risks the schematic turning into a net list.

See the Amiga 500 schematic as a nice compromise between showing links as lines and named links: http://www.amigawiki.de/dnl/schematics/A500_R6.pdf

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8 bit fun and games: https://www.aslak.net/

I like pin numbers in schematics to determine best pin assignments. For instance, I can look at the PCB, and decide that I need to find a GPIO between pins 30-40 for easiest routing, and then go look at the schematic to find a pin.

This is especially useful with FPGAs where you can have almost arbitrary pin assignments.

A4 paper is approximately what we Yanks would call A-size or letter size. The paper I normally use for schematics, ANSI B-size, is 11×17 inches, approximately the size of A3. Even with that size I have to exercise some restraint on how much I put on a page lest it become too cluttered and hard to read.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

Please don't do that on schematics that you want other people to use. It makes them unreadable. In order to see where any signal goes, I have to search the entire schematic. I can't stop when I find the first match, because I don't know how many other places it might go. And I have to repeat that for every single signal.

To make it worse, you've got nets going to other sheets, and no indication which ones they are. I have to search all of every sheet for every net. For a design of that scale, break it into functional blocks. Put the schematic for each block in its own sheet, with external connections (to other blocks) around the edge. Add another sheet showing connections between the blocks.

It's OK to not draw wires for a small number of nets that go to a lot of places - power, clocks, reset, and things like that. Drawing wires for those would add an unacceptable amount of clutter. But most others should have wires drawn. If there are many related nets (such as a data bus, or a collection of chip selects), drawing them as a bus makes the relationship clear and takes a lot less space.

[quote="Aslak3"]As a little bit of an aside, on a theoretical level I wonder why it is mandatory to include pin numbers on schematics, when the pin name should be the canonical way to identify the connection.[\quote]

One of the more important reasons is to help trouble-shooting the hardware. If you want to look at a particular signal, it will tell you exactly where to put the scope probe.

Schematics are a lot more than just a way of entering netlists! Drawing a good schematic is an art. It takes time and effort, but it's worth it.

Here's a piece of a schematic I'm working on right now. It's a corner of an FPGA symbol. Most of the connections just have a label, but it's clear that they are going to the SDRAM, which has a sheet of its own. I don't think it will be any clearer when I start adding a tangled mess of wires, or a bunch of buses. For a JTAG connector, I have drawn wires, and for GND/VCC I just attach the appropriate symbol.

I think those Amiga schematics are a perfect illustration of all these points. They are so nice to read and look at that I'm tempted to turn them into posters. (Also I'm an Amiga fan...)



I hadn't thought of that, thanks. I guess it goes to show that good schematics should be more then just a step to the PCB design.

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8 bit fun and games: https://www.aslak.net/

When I graduated from the U.S. Navy's electronics school 50 years ago I had learned how to read a ship's entire communications schematic, which on a typical World War II destroyer (the type of ship on which I served) ran to some 40 pages. It was all what we now refer to as netlist symbols. Had the schematic been drawn point-to-point as you suggest it would have been unreadable.

My POC unit's schematic runs to seven pages, of which three are the actual circuitry. It is broken down into functional areas: MPU interface; RAM, ROM and I/O; and external interface. The general flow is conceptually from "left" to "right" and I daresay that it is readily understood by anyone who is skilled in the art.

Something else to consider is that there was a period of time in which I was working on and with telephone switching machines (PBXes). The schematics for those monsters were also drawn with what we now call netlists. Point-to-point drawings would have been completely unwieldy, especially where connections were made to rotary stepping relays or crossbar switches.

BTW, I attached the previous example, but with some connections replaced with point-to-point. I didn't redo the entire circuit, as it would have been all but impossible to route every lead point-to-point as you suggest.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

Haha, fun fact in the Amiga schematic. Did anyone noticed that they called the /BERR (Bus ERRor) line (pin 22) actually /BEER

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How should I know what I think, until I hear what I've said.

Yep! There were a lot of yucks about that when the Amiga schematic first became available in the 1980s (supposedly, a disgruntled employee at Commodore leaked it). Kind of reminds me of the "Chuck Peddle pin" on the 6502. You know, the one that sets the V bit in SR when toggled... Rumor had it that Peddle was indeed an SOB to work for.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

I don't suppose anyone fancies trying out my WDC EagleCAD library? See attached if so.
Any constructive feedback welcome

BTW I've still got to add descriptions so this library is "beta"

Eagle allows you to add multiple package variant in the same device. That helps to keep the device selection more organized. When it complains "package variant already defined", it means you just have to rename the existing variant first before adding a new one.

In your SMD parts, the solder paste layer (tCream) is done automatically to fill the entire pad. For use with stencils, that usually leads to too much solder paste on the pad. It's better to add your own solder paste layer, only covering about 80% of the pad. Of course, that's a lot of work, especially if you don't use stencils yourself.

I work on industrial equipment that typically has schematics in the hundreds of pages. They use netlist symbols, and almost always have a several page cross-reference in the back of the book. The cross-reference tells you which pages each symbol can be found on, and sometimes even coordinates for where in the page they are. It works very, very well. I can't imagine it any other way.

I've drawn three-page ones the way you prefer, and they are unreadable.