I was wondering if anyone knows if WDC has ever thought of heading down the path taken by Commodore/MOS Tech with the 6510? I.e. adding in I/O ports and "extras" to the 6502.
I suspect the answer might just be that they are keeping to the central idea of the 6502 being as basic/to the point as humanely possible, but perhaps there is a licensing issue?
Just wondering.

They already have: the W65C134S and W65C265S. You can find all the details at http://www.westerndesigncenter.com/wdc/documentation.cfm. Mouser list both in stock.

Thanks John. Those hadn't hit my radar.
I've had a look at the datasheets and they do look interesting, although it seems (if I'm reading this correctly) that WDC has chosen to use proper, old fashioned ROM instead of E(E)PROM or Flash for the internal non-volatile storage. This means that this cannot be programmed afterwards so it'll never be useable by the likes of you and me? Of course, we can tell it to use external ROM instead, but it seems a shame. Other than that it all looks usable.

I feel the same way, even though it's churlish to complain. There's so much functionality there! Even after connecting a '265 to external ROM -- no address latch required, BTW -- you still have about 40 IO pins free.

16-bit cmos CPU? And a ton of on-chip peripherals? Rather a large step forward, compared to 6510!

Has anyone been able to ascertain whether the on-chip UARTs share the WDC 65C51 bug?

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

I seem to recall Andrew (?) reporting that the UART has the stuck TxD ready bit like the discrete part.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

Thanks, but the questionable recollection turns out to be not entirely pertinent. A quick forum Search turned up this post by Andrew, but he cites a bug in the driver for his W65C134's on-chip UART. Is anyone aware of further information?

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Hmmm, I think Andrew picked up the SXB board with the 816 processor, not the 134 based microcontroller. As the 816 board has the PLCC 65C51, it's the same LOT number with the Xmit bug. I doubt the 134 or 256 chips would have the bug as the onboard monitor code would not work.

_________________
Regards, KM
https://github.com/floobydust

He may also have an 816 system, but this thread is about a nice little homebrew '134. Sorry, I probably should've included a link to the lead post -- it's here.

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Ah, thanks for that. I also looked at picking up a 134 chip some time ago, but the paperwork made no sense... like export duty and signing one's name away on government docs, so I cancelled the order from Mouser. In any case, the built-in monitor code wouldn't work if the onboard UART had the same Xmit bug as the latest run of 65C51 chips. In a recent conversation with WDC, currently there are no plans to do another release of the 65C51 yet, so we're stuck with the buggy chips for the time being.

Andrew does have the newer WDC SXB board with the 816 chip. A brief glance at some of his code for it (github), seems to indicate he's using one of the 65C22 timers to throttle the transmit for the 65C51. I thought of doing a similar patch in my C02Bios but haven't bothered yet... WDC did send me a few chips to play with. One of them works pretty well without the Xmit bug (older LOT#) but requires an external clock oscillator to work properly. Here's the link to the thread for the SXB: viewtopic.php?f=1&t=3398

KM

_________________
Regards, KM
https://github.com/floobydust

Yes, I'm using a VIA Timer2 in one shot mode to generate an interrupt a little after the ACIA should have finished transmitting the last character.

My '134 board is a homebrew which has been set aside for while. My code suggests that the ACIA in that chip does work correctly, but its been a while since I run it.

_________________
Andrew Jacobs
6502 & PIC Stuff - http://www.obelisk.me.uk/
Cross-Platform 6502/65C02/65816 Macro Assembler - http://www.obelisk.me.uk/dev65/
Open Source Projects - https://github.com/andrew-jacobs

Ah, right. Not sure what was going on in my little dinosaur brain when I wrote that.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

Hmm I think I might grab one of each from Mouser then. Never really used PLCC though and the cost of wire wrap PLCC sockets... ouch! Higher than the cost of the controller .
I might try the "do it yourself" sockets mentioned in other posts .

Not really complaining, just wish it could be different as having flash or E(E)PROM would be awesome


I'm in total agreement.